Browse Prior Art Database

CENTRAL PROCESSING CONTROL SYSTEM

IP.com Disclosure Number: IPCOM000023929D
Original Publication Date: 1979-Apr-30
Included in the Prior Art Database: 2004-Apr-01

Publishing Venue

Xerox Disclosure Journal

Abstract

Referring to Figure 1, a central processing unit (CPU) 10 comprises a data section 12, a control section 14, a main memory 16 and a plurality of input/output (I/O) controllers 18, e.g-,fifteen I/O controllers designated 18(i) through 18(1 - Each of the I/O controllers 18 is connected to a respective one o'f a plurality o"tT/O devices 20 for controlling same. Examples of typical I/O devices are disk drives, displays, keyboards, etc.

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XEROX DISCLOSURE JOURNAL

CENTRAL PROCESSING CONTROL SYSTEM ~Y~Leung
Charles P~Thacker

Proposed Classification U~S~CL 340/172,5

mt. Cl. G06f 1/00

Referring to Figure 1, a central processing unit (CPU) 10 comprises a data section 12, a control section 14, a main memory 16 and a plurality of input/output (I/O) 18controllers 18, e.g~,fifteen I/O controllers designated(i) through 18(1 ~ Each of the I/O controllers 18 is connected to a respective one o'f a plurality o"tT/O devices 20 for controlling same. Examples of typical I/O devices are disk drives, displays, keyboards, etc.

Information is transferred to and from the data section 12 of the CPU 10 by means of a main data transfer bus 22. Information may be transferred on the data bus 22 between the main memory 16 and the data section 12 as well as between each of the I/O controllers 18 and the data section 12.

Each I/O controller 18 is identified by a unique task request ("wake-up") signal that is applied along a line 24 to the control section 14 of the CPU 10 when that controller requires servicing. In order for the controller 18 to be informed when the CPU 10 is executing instructions relating to the requested service, the control section 14 includes means for applying a "task-active" status signal back to the controller. These task-active status signals are applied on lines 26 from the control section 14 to the controllers 18.

FIG, /

Volume 4 Number 2 March/April 1979 239

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CENTRAL PROCESSING CONTROL SYSTEM (Cont~d)

Each of the plurality of tasks to be serviced is preassigned a unique priority value. Thus, servicing I/O controller 18(~~may be of higher priority than servicing I/O controller 18(15~. The control se'~fion14 then forwards instructions to the data section for exe~ution that are associated with the highest current task to be serviced.

Referring to Figure 2, the control section 14 includes a priority encoder 28 which has sixteen task request inputs connected to the sixteen task request lines 24. The priority encoder 28 includes circuitry for generating a multi-bit control signal on a respective plurality of lines 30 (only one shown) related to the highest priority task request signal currently applied as an input to the encoder 28. The priority encoder 28 includes a further input for receiving a RESET signal on a line 32 from an initialization circuit 34,

   XEROX DISCLOSURE JOURNAL Volume 4 Number 2 March/April 1979

(TO DATA SECTION 14)

240

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CENTRAL PROCESSING CONTROL SYSTEM (Cont~d)

The control signal developed on lines 30 is applied to respective inputs of a current task register 36 which responds to such control signal for generating a multi-bit address signal that is applied in bit-parallel format on a respective plurality of lines 38 from the register 36 to respective inputs of an address memory 40. The address memory 40 includes a plural...