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HARDWARE IMPLEMENTATION OF 4-PIXEL CODE ENCODER

IP.com Disclosure Number: IPCOM000024529D
Original Publication Date: 1980-Oct-31
Included in the Prior Art Database: 2004-Apr-02
Document File: 2 page(s) / 83K

Publishing Venue

Xerox Disclosure Journal

Abstract

There is a need in electronic systems for compacting data so that the information contained within said data may be stored in less memory or transmitted at a higher rate. A problem with a simple run-length encoder is that it must process each input bit as it is received. To speed up the data rate, the run-length encoder may be designed to process data bits in parallel. The parallel processing of data in the form of data blocks increases the data rate, but ultimately a limit is reached based on the number of bits per block, which must be optimized for the particular application, and the circuit complexity, whicb must be minimized. An example of a commerically useful encoder is one that can operate in excess of 50 M bits per second in the compression of image data.

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XEROX DISCLOSURE JOURNAL

HARDWARE IMPLEMENTATION OF

4-PIXEL Vinod K. Kadakia CODE ENCODER Glen D. Jones
Kedar D. Parikh
Ronald E. Rider

IALL ZERO NIBU

Proposed Classification
U.S. C1. 358/133 Int. C1. H04n 7/12

. EV

COUNTER

1 1

.

4 TERMINATING

I I

'8

I

TRI - STATE

a

la Tb

110

1 c

CONTROL PROM

1

OUTPUT BIT 8 w 9 LEVEL

Volume 5 Number 5 September/October 1980 543

[This page contains 1 picture or other non-text object]

Page 2 of 2

HARDWARE IMPLEMENTATION OF 4-PIXEL CODE ENCODER (Cont'd)

There is a need in electronic systems for compacting data so that the information contained within said data may be stored in less memory or transmitted at a higher rate.

A problem with a simple run-length encoder is that it must process each input bit as it is received. To speed up the data rate, the run-length encoder may be designed to process data bits in parallel. The parallel processing of data in the form of data blocks increases the data rate, but ultimately a limit is reached based on the number of bits per block, which must be optimized for the particular application, and the circuit complexity, whicb must be minimized. An example of a commerically useful encoder is one that can operate in excess of 50 M bits per second in the compression of image data.

The circuit described herein receives data in the form of four-bit nibbles, and produces an encoded and compressed output of from four to twenty-four bits per word.

The encoder groups the input data into data words comprisin...