Browse Prior Art Database

PASS-THROUGH WITH GAIN

IP.com Disclosure Number: IPCOM000025232D
Original Publication Date: 1984-Feb-29
Included in the Prior Art Database: 2004-Apr-04
Document File: 2 page(s) / 49K

Publishing Venue

Xerox Disclosure Journal

Abstract

This invention relates to an improved polycell chip design technique for automatic-ally placing logic elements (cells) and optimally routing their interconnects (lines). In a concurrent disclosure ("Polycell Place and Route Technique") it was proposed to provide the cell in two parts, viz. a logic function and an expandable buffer driver. The auto place and route computer program would select and increase the size of the buffer driver in proportion to the length of the interconnect line in order to achieve a uniform intercell signal propagation time.

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I XEROX DISCLOSURE JOURNAL

PASS-THROUGH WITH GAIN Proposed Donald Scharfetter Classification

U.S. C1. 364/154 Int. CI. G05b 13/02

This invention relates to an improved polycell chip design technique for automatic- ally placing logic elements (cells) and optimally routing their interconnects (lines). In a concurrent disclosure ("Polycell Place and Route Technique") it was proposed to provide the cell in two parts, viz. a logic function and an expandable buffer driver. The auto place and route computer program would select and increase the size of the buffer driver in proportion to the length of the interconnect line in order to achieve a uniform intercell signal propagation time.

In the present invention, the usual pass-throughs which bridge buses at periodic intervals are beneficially utilized. By incorporating one or more buffer drivers in the pass-through, the gain will be distributed along the long lines but will not take up valuable real estate. Thus, the auto place and route computer program may be modified to recognize that when a long line is routed through a pass-through one or more gain cells will be incorporated into the pass-through. This will change the logic diagram but will not present a functional change in the circuit, while minimizing electrical delay times between remote cells.

Volume 9 Number 1 January/February 1984 81

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  ' XEROX DISCLOSURE JOURNAL Volume 9 Number 1 January/Februa...