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METHOD FOR PRODUCING FREE STANDING ULTRA THIN SAMPLES OF GaAs

IP.com Disclosure Number: IPCOM000025823D
Original Publication Date: 1988-Jun-30
Included in the Prior Art Database: 2004-Apr-04
Document File: 4 page(s) / 137K

Publishing Venue

Xerox Disclosure Journal

Abstract

A selective etch system is employed in conjunction with a layered heterostructure wafer sample to produce specimens containing a 20 nm GaAs window approximately 1.5 mm wide spanning a formed 3 mm diameter GaAs annulus or doughnut.

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[EROX DISCLOSURE JOURNAL

METHOD FOR PRODUCING FREE STANDING ULTRA THIN SAMPLES OF GaAs
David K. Biegelsen

Proposed Classification
U.S. C1.1561643 Int. C1. B44c 1/22

RE PLASMA RIE PLASMA

SILICON WAFER SILICON WAFER SILICON WAFER

SILICON WAFER SILICON WAFER

14 F/G. 2

Volume 13 Number 3 May/June 1988 113

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METHOD FOR PRODUCING FREE STANDING ULTRA THIN SAMPLES OF GaAs (Cont'd)

A selective etch system is employed in conjunction with a layered heterostructure wafer sample to produce specimens containing a 20 nm GaAs window approximately 1.5 mm wide spanning a formed 3 mm diameter GaAs annulus or doughnut.

The initially prepared multilayer structure 10, shown in Fig. 1, comprises an undoped GaAs substrate with alternating layers of GaAs and Gal-xAlxAs deposited by metal organic chemical vapor deposition (MO CVD) wherein x may be equal to 0.40. Any A1 concentration greater than 40% would work equally as well relative to the process employed herein. Some of the prepared wafer samples were also polished to a 0.1 mm thickness to enhance the rate of the reactive ion etch (RIE) utilized in this process, but such a polishing is not required. The wafer samples were then cored into 3mm diameter specimens 12 for eventual TEM utilization. Multiple of such specimens 12 were then loaded into a pair of silicon wafers having matched counter bore holes 14 which supported and masked the specimens 12 in the RIE processor. This wafer support structure is illustrated in Fig. 2. As illustrated in Fig. 2, the specimen's epitaxially deposited layers are mounted face down away from the direct force of the etching plasma.

RIE was performed in a Varian ZLN-20 etcher by S. Salimian [l] at Varian Associates and was carried out with a 47% ratio of SFG/SiC14 mixture. This etchant is selectively 500 times greater in the rate of etching GaAs compared to the rate of etching for Ga0.6A10.4As. Thus, a 400 pm wafer can be vaporized faster than a 1 pm GaAlAs stop layer.

After a GaAs doughnut shape is formed by this process, specimens 12 are individual...