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DUAL FUNCTION READ/WRITE BAR - HIGH EFFICIENCY LED ARRAYS ON BUTTED NMOS SILICON CHIPS

IP.com Disclosure Number: IPCOM000025886D
Original Publication Date: 1988-Oct-31
Included in the Prior Art Database: 2004-Apr-04
Document File: 2 page(s) / 83K

Publishing Venue

Xerox Disclosure Journal

Abstract

For a full width array of sensors composed of monolithic short NMOS silicon chips that have been accurately cut and butted together, it is proposed that an array of high efficiency Light Emitting Diodes (LEDs) be added epitaxially to the silicon NMOS ships. The LEDs would be arranged parallel to the array of sensors and share some of the same circuitry for use in addressing and driving the LEDs. Moreover, the LEDs could act as the sensors themselves anci thus share much of the circuitry. In other embodiments, the LEDs might provide illumination for the array sensors. In this way, the same cutting, butting, and alignment of the silicon chips that is used to produce a full width array could be used to produce a dual function array. And if packaged with a gradient index lens array, both sensor and LED array could also share the same lens.

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XEROX DISCLOSURE JOURNAL

DUAL FUNCTION READ/WRITE Proposed Classification

ON BUTTED NMOS SILICON CHIPS

Joseph J. Daniele

For a full width array of sensors composed of monolithic short NMOS silicon chips that have been accurately cut and butted together, it is proposed that an array of high efficiency Light Emitting Diodes (LEDs) be added epitaxially to the silicon NMOS ships. The LEDs would be arranged parallel to the array of sensors and share some of the same circuitry for use in addressing and driving the LEDs. Moreover, the LEDs could act as the sensors themselves anci thus share much of the circuitry. In other embodiments, the LEDs might provide illumination for the array sensors. In this way, the same cutting, butting, and alignment of the silicon chips that is used to produce a full width array could be used to produce a dual function array. And if packaged with a gradient index lens array, both sensor and LED array could also share the same lens.

To add integrated LEDs to the NMOS silicon chips, after fabrication of the NMOS chip and prior to the final metallization, the wafer is coated with Si02 or Si3N4, with windows opened for depositing of GaAs/GaAlAs LEDs.

BAR - HIGH EFFICIENCY LED ARRAYS U.S. C1.357/17

Int. C1. HOll33/00

High efficiency GaAsIGaA1As LED material is then epitaxially deposited on the silicon using Molecular Beam Epitaxy (MBE), and the LED structure (in this case, a surface emitting hetero-structure) is grown. The wafers are completed b...