Browse Prior Art Database

LARGE ARRAY CHIP SUBUNIT ALIGNMENT BY WAFER KEYS

IP.com Disclosure Number: IPCOM000026228D
Original Publication Date: 1990-Dec-31
Included in the Prior Art Database: 2004-Apr-05
Document File: 6 page(s) / 213K

Publishing Venue

Xerox Disclosure Journal

Abstract

Pagewidth integrated circuit chips such as imaging or scanning array subunits (RIS or ROS) are generally produced by an assembly of fully functional subunits linearly aligned on one surface of a structural member. The confronting edges of the subunits or chips are used to align them precisely on the structural member which forms part of the final apparatus.

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Page 1 of 6

XEROX DISCLOSURE JOURNAL

LARGE ARRAY CHIP SUBUNIT Proposed Classification ALIGNMENT BY WAFER KEYS
Donald J. Drake
Michael R. Campanelli

US. C1.346/140R Int. C1. Gold 15/18

12

15

XEROX DISCLOSURE JOURNAL - Vol15 No 6 NovembedDecember 1990 413

[This page contains 1 picture or other non-text object]

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LARGE ARRAY CHIP SUBUNIT ALIGNMENT BY WAFER KEYS( Cont'd)

2B

414 XEROX DISCLOSURE JOURNAL - Vol15 No 6 NovemberDecember 1990

[This page contains 1 picture or other non-text object]

Page 3 of 6

LARGE ARRAY CHIP SUBUNIT ALIGNMENT BY WAFER KEY S(Cont'd)

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74A Fig. 3A

XEROX DISCLOSURE JOURNAL - Vol15 No 6 NovembedDecember 1990 415

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Page 4 of 6

LARGE ARRAY CHIP SUBUNIT ALIGNMENT BY WAFER KEY S(Cont'd)

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416 XEROX DISCLOSURE JOURNAL - Vol15 No 6 NovembedDecember 1990

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[This page contains 1 picture or other non-text object]

Page 5 of 6

LARGE ARRAY CHIP SUBUNIT ALIGNMENT BY WAFER KEY S(Cont'd)

Pagewidth integrated circuit chips such as imaging or scanning array subunits (RIS or ROS) are generally produced by an assembly of fully functional subunits linearly aligned on one surface of a structural member. The confronting edges of the subunits or chips are used to align them precisely on the structural member which forms part of the final apparatus.

An alternate architecture, shown in Figure 1, uses an alignment slot 14 fabricated in the bottom 13 of the chip or subunit 12. This slot acts as a keyway which fits a key 16 that is fabricated on an aligning substrate 18. The subunit slot can be slid over the key on substrate 18 which aligns the subunits in x, y, and z space to form a pagewidth device 10.

The key 16 is easily fabricated on a flat metal alignment substrate 18 by photopatterning films or by photopatterned electroforming. Either thick film photoresists or thin film positive photoresists can be used as a pattern. Examples of differently shaped keys are shown in Figure 2. In Figure 2a, a thin film photoresist 23 is deposited on a conductive alignment substrate 18a and patterned for electroforming cylindrical metal keys 16a. In Figure 2b, the thick film resist may be used as the keys 16b or the resist may be patterned and the keys 16b electroformed to the thickness of the resist (not shown). For electroforming, the alignment substrate 18b must be conductive, such as, for example, copper. Figure 2c depicts the keys 16c formed by orientation dependent etched (ODE) silicon alignment substrates 18c. Silicon nitride masking layer 25 is patterned and ODE etched to form the keys 16c having etched walls 26 which follow the (111) planes of (100) silicon substrates 18c. The ODE process is timed for appropriate height of the keys 16c, thus producing a bare silicon surface 27 between the keys.

The chip slot can be made using any of several techniques. Referring to Figure 3, one straightforward technique is to use...