Browse Prior Art Database

WIRE BOND ENCAPSULATION METHOD FOR FULL WIDTH SEMICONDUCTOR ARRAYS

IP.com Disclosure Number: IPCOM000026557D
Original Publication Date: 1992-Oct-31
Included in the Prior Art Database: 2004-Apr-06
Document File: 4 page(s) / 266K

Publishing Venue

Xerox Disclosure Journal

Abstract

Disclosed herein is an ecapsulation method for providing wire bond corrosion protection on full width photo sensor chip arrays. A general configuration of a full width array image input device, commonly referred to as a "Scanner Bar", is shown in Figure 1. Full width array 10 consists of butted silicon chip array 20 having photosites 30 near one edge, that are mounted on substrate 40. A rigid interconnect strip 50 with electrical connector 60, generally composed of epoxy-glass printed wire board, is also mounted on substrate 40. Figure 3A shows butted silicon chip array 20 in more detail, with photosites 30 near one edge of chip array 20 and wires 70 at the other. Wires 70 bond to rigid interconnect strip 50 for communication with devices outside the full width array 10.

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XEROX DISCLOSURE JOURNAL

WIRE BOND ENCAPSULATION Proposed Classification METHOD FOR FULL WIDTH
SEMICONDUCTOR ARRAYS
Kraig A. Quinn
Brian
T. Onnond
Josef
E. Jedlicka

U.S. C1.346/140R Int. C1. Gold 15/18

- FIG. I

FIG. 2

XEROX DISCLOSURE JOURNAL - Vo1.17 No. 5 SeptembedOctober 1992 305

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- WIRE BOND ENCAPSULATION METHOD FOR FULL WIDTH SEMICONDUCTOR ARRAYS (Cont'd)

50

20

40

FIG. 36

FIG. 4A

95

FIG. 4B

306 XEROX DISCLOSURE JOURNAL - V01.17 No. 5 September/October 1992

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WIRE BOND ENCAPSULATION METHOD FOR FULL WIDTH SEMICONDUCTOR ARRAYS (Cont'd)

material is extensible to any flexible material having suitable electrical, chemical and physical properties. TCE mismatch could have also been resolved by using broken beads of rigid encapsulating material. Laying down continuous beads of encapsulant provides better uniformity, more control and higher throughput, thereby leading to improved manufacturability. The method also leaves bonding wire loops unencumbered to move, allowing relative movement between semiconductor chip array 20 and interconnect strip 50. Since substrate TCE is closely matched to circuit chips, they behave as one material. Interconnect strip 50 however has a significantly different TCE.

The disclosed encapsulation method does not intend to provide any mechanical protection, it does however protect bonds against corrosion in close proximity to photosites without cove...