Browse Prior Art Database

HIGH ADDRESSABILITY RESOLUTION CONVERSION AND IMAGE ENHANCING

IP.com Disclosure Number: IPCOM000027228D
Original Publication Date: 1995-Oct-31
Included in the Prior Art Database: 2004-Apr-07
Document File: 4 page(s) / 202K

Publishing Venue

Xerox Disclosure Journal

Abstract

Disclosed is a hardware description of an algorithm for High Addressability (HA) ROS printing that will enable a system to perform high addressability resolution conversion (RC) and high addressability image cleaning, e.g. halfbit removing.

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Page 1 of 4

XEROX DISCLOSURE JOURNAL

HIGH ADDRESSABILITY RESOLUTION CONVERSION AND IMAGE ENHANCING

Proposed Classification
U.S. C1.358/283 Int. C1. H04n 1/40

Robert E. Coward
James D. Parker

LOGIC SET FOR PIXEL HAOP 1

  INPUT PIXEL ORIENTATION RELATIVE TO THE

INPUT SCANLINE DATA BUFFER

I

CHIP

SELECT

FIG. I

XEROX DISCLOSURE JOURNAL Vol. 20 No. 5 September/Odober 1995 459

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HIGH ADDRESSABILITY RESOLUTION CONVERSION AND IMAGE ENHANCING(Cont'd)

LOGIC SET FOR OUTPUT PIXEL HAOP 2

  INPUT PIXEL ORIENTATION RELATIVE TO THE

       INPUT SCANLINE H DATA BUFFER

 ADDRESS SELECT LINES

PIXELE I 4

F DATA LINE,-I

  HA OUTPUT PIXEL 2

SELECT 44::xl

I

FIG. 2

460 XEROX DISCLOSURE JOURNAL Vol. 20 No. 5 September/October 1995 I I

[This page contains 1 picture or other non-text object]

Page 3 of 4

HIGH ADDRESSABILITY RESOLUTION CONVERSION AND IMAGE ENHANCING(Cont'd)

Disclosed is a hardware description of an algorithm for High Addressability (HA) ROS printing that will enable a system to perform high addressability resolution conversion (RC) and high addressability image cleaning, e.g. halfbit removing.

The present system is designed to be implemented as a 3x3 pixel logic mask that is applied to the input image via high speed techniques such as: Logic Gates, BITBLT operations, or Lookup Tables. Additional characteristics of the algorithm are that it operates entirely in binary space, therefore providing the advantages of minimizing data buffer requirements, and maximizing throughput speed.

The fundamental image quality premise of the algorithm for the present disclosure is that phase errors encountered in prior symmetrical RC algorithms have been minimized. Furthermore, as an HA RC system, the present algorithm and application will not degrade from a matrix (with a surrounding context) to a vector operation as the Area Mapping type algorithms do when utilized as HA RC methods. Additional advantages of using HA techniques for RC and image cleaning (quality enhancing) are the following: Firstly, in the RC applications, HA has eliminated the need to perform RC in two dimensions. RC via HA has simplified the process to essentially one operation in the slow scan direction, and thereby reduces the error introduced by earlier techniques. Secondly, there is no longer the need to operate through an intermediate gray image and perform error diffusion as is done in the area mapping RC algorithms. These factors provide an enhanced output image quality, and a faster processing speed.

A pixel window is utilized in the present application, that masks out a set of 9 pixels from the input image. The mask identifies 3 pixels from 3 scanlines of the input image. Figure 1 illustrates the 3x3 mask, and the pixel orientationsAabels for the logic operations. The masked pixels should be clocked into the gates and the HA output pixels read from the mux. To generate subsequent HA output pixels, the input mask should be moved in the fast sca...