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Browse Prior Art Database

NVM ARCHITECTURE USING FLASH MEMORY INSTEAD OF BATTERY BACKED RAM

IP.com Disclosure Number: IPCOM000027467D
Original Publication Date: 1997-Feb-28
Included in the Prior Art Database: 2004-Apr-08
Document File: 6 page(s) / 246K

Publishing Venue

Xerox Disclosure Journal

Abstract

Disclosed is an apparatus that bi-directionally transfers bytes of memory between volatile and nonvolatile storage allocations using a RAM (Random Access Memory) architecture and a Flash Memory. One skilled in the art will recognize that Flash Memory is a type of nonvolatile memory similar in function to EEPROM (Electrically Erasable Programmable Read Only Memory). However, Flash Memory must be erased in blocks, whereas EEPROM can be erased one byte at a time.

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Page 1 of 6

XEROX DISCLOSURE JOURNAL

NVM ARCHITECTURE USING FLASH MEMORY INSTEAD OF BATTERY BACKED RAM Int. C1. Gllc 17/00 Eric S. Redleaf
Laura Fichter

Proposed Classification
U. S. C1.365/094

I

I I

I

70

0 54,

74

I

6o

\I FLASH MEMORY

NG. 1

51 XEROX DISCLOSURE JOURNAL - Vol. 22, No. 1 JanuaryFebruary 1997

[This page contains 1 picture or other non-text object]

Page 2 of 6

NVM ARCHITECTURE USING FLASH MEMORY INSTEAD OF BATTERY BACKED RAM (CONT'D)

INITIALIZE

NVMSTART

7 8 4

INlTlALlZE

NVM END

    CALCULATE NVM STORAGE OFFSET

I

1 f"

WRITE RAM (I, SAVE VALUE)

SAVE VALUE t READ FLASH (I + NVM STORAGE OFFSET)

FIG. 2

XEROX DISCLOSURE JOURNAL - Vol. 22, No. 1 JanuaryFebruary 1997

I

92

52

[This page contains 1 picture or other non-text object]

Page 3 of 6

NVM ARCHITECTURE USING =ASH MEMORY INSTEAD OF BATTERY BACKED RAM (CONT'D)

START

(+ 194

 PROCESS INTERRUPT

I 1

I

DOWN BATTERY CIRCUIT

1 I i 98

ERASE NVM BLOCK OF FLASH MEMORY

1 I

100

I

FROM

NVM END

102

i

TURN OFF SAVE VALUE c READ RAM (I)

0 BATTERY

CIRCUIT

WRITE FLASH (I + NVM STORAGE OFFSET, SAVE VALUE)

FIG. 3

XEROX DISCLOSURE JOURNAL - Vol. 22, No. 1 JanuaqdFebruary 1997 53

[This page contains 1 picture or other non-text object]

Page 4 of 6

NVM ARCHITECTURE USING FLASH MEMORY INSTEAD OF BATTERY BACKED RAM (CONT'D)

Disclosed is an apparatus that bi-directionally transfers bytes of memory between volatile and nonvolatile storage allocations using a RAM (Random Access Memory) architecture and a Flash Memory. One skilled in the art will recognize that Flash Memory is a type of nonvolatile memory similar in function to EEPROM (Electrically Erasable Programmable Read Only Memory). However, Flash Memory must be erased in blocks, whereas EEPROM can be erased one byte at a time.

Currently NVM (Nonvolatile Memory) requirements for most designs represent a small portion of the total RAM storage allocation. Flash Memory is becoming popular because it is easy to program and erase. In traditional NVM applications a battery is used to maintain the integrity of data stored in RAM during the absence of power. The disclosed architecture uses battery power to allow a NVM device to operate long enough to transfer RAM data to the Flash Memory. Once the transfer is complete a processor isolates the battery so no additional power is drained therefrom.

A Lithium battery has an expected lifetime of approximately 5 years assuming that the drain on the battery is idle for about 16 hours a day (typical for office equipment). The disclosed apparatus consumes approximately 13 seconds of battery life each time it is turned on and off. A Flash Memory can be programmed at least 10,000 times and can reliably sustain being programmed approximately 100,000 times. Assuming the disclosed architecture is powered on and off once a day, 365 days a year, the Flash Memory is capable of functioning as a NVM for 27.4 to 274 years.

Figure 1 schematically represents a preferred embodiment of the disclosed apparatus. Components comprising the architect...