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Method for clock-encoded data with no bandwidth or latency overhead

IP.com Disclosure Number: IPCOM000029129D
Publication Date: 2004-Jun-16
Document File: 3 page(s) / 54K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method for clock-encoded data with no bandwidth or latency overhead. Benefits include improved performance.

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Method for clock-encoded data with no bandwidth or latency overhead

Disclosed is a method for clock-encoded data with no bandwidth or latency overhead. Benefits include improved performance.

General description

              The disclosed method generates clock encoded data with no bandwidth or latency overhead. The technique involves scrambling the data at the driver side and descrambling at the receiver side, which adds edges to the data without direct modification or coding of the data. No extra bits are added to the data and no coding latency is incurred (see Figure 1).

Advantages

              The disclosed method provides advantages, including:

•             Improved performance due to having no bandwidth overhead

•             Improved performance due to adding no extra encoding latency

Detailed description

              The disclosed method scrambles the input data with an XOR gate and a pseudo-random number generator, which is typically a linear feedback shift register (LFSR). The data is sent through the communication channel and is descrambled in the receiver by another LFSR and an XOR gate. If the driver and receiver LFSRs are synchronized correctly, the output data is identical to the input data. To synchronize successfully, the reset to the receiver LFSR must be a delayed version of the driver LFSR reset. The amount of delay is equal to the propagation time through the driver, channel, and receiver.

              Assuming that the input data and LFSR output is random, the probability of a data edge occurring in any given cycle can be statistically characterized. The probability of an edge occurring in any given cycle can be summarized in a table (see Figure 2). The right-hand column shows whether an edge occurs with a particular sequence. Because the input data and LFSR output is random, all combinations have an equal probability of occurring. The probability of the scrambled data having a clock edge in any given cycle is ½. The probability of receiving at least one clock edge for N number of clock cycles is ½N. For example, by using the method above, t...