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Method for frequency domain SSN analysis of a high-speed circuit

IP.com Disclosure Number: IPCOM000029243D
Publication Date: 2004-Jun-18
Document File: 3 page(s) / 305K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method for frequency domain simultaneous switch noise (SSN) analysis of a high-speed circuit. Benefits include improved functionality and improved performance.

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Method for frequency domain SSN analysis of a high-speed circuit

Disclosed is a method for frequency domain simultaneous switch noise (SSN) analysis of a high-speed circuit. Benefits include improved functionality and improved performance.

Background

      Conventionally, circuit modeling packages that are commercially available or available through educational institutions.

Description

              The disclosed method (see Figure 1) is SSN analysis for a high-speed printed circuit board (PCB)/package system (see Figure 2). For example, the package structure can include 16 ports (see Figure 3). Its wirebond structure includes a 5-mm signal wirebond(WB), a 3-mm power WBH, and a 1-mm ground WB (see Figure 4).

              The disclosed method extracts the space [S] parameter of the structure using the finite difference frequency domain (FDFD) method (see Figure 5). The [S] parameters are converted into a behavior circuit model via Laplace transformation. The impedance of the power/ground network in the frequency domain is analyzed to select the optimal decoupling capacitors based on the flow. The SSN in time domain is calculated through linking with a circuit simulation model (see Figure 6).

              The disclosed method yields results with improved accuracy (10% error) and performance (~50% improvement) over conventional methods. The method can be combined with other models.

Advantages

              Some implementations of the disclosed structure and method provide one or mo...