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Managing the Internet Protocol over High Performance Switch Receive Function for Complex and Varied Environments

IP.com Disclosure Number: IPCOM000029574D
Original Publication Date: 2004-Jul-07
Included in the Prior Art Database: 2004-Jul-07
Document File: 2 page(s) / 41K

Publishing Venue

IBM

Abstract

This disclosure addresses the management of the internet protocol interface over a high performance switch receive function within varied and complex environments. The proposed solution is to setup a two mode system for receiving, both an interrupt-driven mode and a thread-bound mode. The performance benefits of running in a threaded mode are still retained but by being able to swap out to the interrupt mode periodically the interface does not bind to any particular processor for a great number of cycles.

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Managing the Internet Protocol over High Performance Switch Receive Function for Complex and Varied Environments

    This disclosure addresses the management of the internet protocol interface over a high performance switch receive function within varied and complex environments. The proposed solution is to setup a two mode system for receiving, both an interrupt-driven mode and a thread-bound mode. The performance benefits of running in a threaded mode are still retained but by being able to swap out to the interrupt mode periodically the interface does not bind to any particular processor for a great number of cycles.

    In similar interface device drivers which are run over high performance switch fabrics, the interface layer's receive function has been assumed to be running in an environment where the operating system and drivers followed the original documented rules for how many cycles should be spent at various interrupt priority levels However, these original documented rules did not continue to apply as machines became more powerful. For example, as machines increased in memory sizes, the number of cycles a sync() call could spend at off-level interrupt priority increased to the range of a few seconds. The original design of the high performance switch code did not expect this many cycles to be spent at interrupt priority by kernel, or another driver's, code, and the result was that the high performance switch code could be delayed by other interrupt code, resulting in unacceptable network latencies on the switch.

    The software design which is here disclosed is for the receive function for the internet protocol interface over the high performance switch. This design incorporates two phases. The first is the interrupt phase, in which the firmware provides an interrupt for each received packet to the internet protocol interface layer. The second phase is an offlevel handler, in which a thread is provided to handle receipt of packets until there is a break in the traffic or the interface exceeds a certain maximum number of incoming packets. There is a toggle mechanism between the two modes which is variable depending on the environment on which the software will be run. For example, in a business environment where a full system synchronization will occur repeatedly,...