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Method for a byte-to-double-word addressing converter

IP.com Disclosure Number: IPCOM000029800D
Publication Date: 2004-Jul-13
Document File: 6 page(s) / 67K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method for a byte-to-double-word addressing converter. Benefits include improved functionality and improved performance.

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Method for a byte-to-double-word addressing converter

Disclosed is a method for a byte-to-double-word addressing converter. Benefits include improved functionality and improved performance.

Background

              In image processing and video processing, providing the right data to the processing engine is the key to performance.

              Memory access performance is improved if image data is accessed in a regular sequence and its starting address is on the double word boundary because ¾ of access time is saved. However, most image data are byte data and, sometimes, the data are accessed from not-double-word boundary locations. Many digital signal processing (DSP) algorithms access data from byte boundary data, such as filters.

              Byte addressing can address any location in memory. Each action, such as read or write, accesses one byte of data (see Figure 1).

              Double-word addressing retrieves the data located from the double-word boundary. For example, access starting from the 0th byte, 4th byte, and 8th byte. Each action, such as read or write, accesses four bytes of data (see Figure 2).

              Byte-addressing memory can have double-word-accessing capability. However, double-word-addressing should not have byte-accessing capacity or three-quarters of memory space is unused.

              Reading or writing one byte of data from/to byte addressing memory is difficult and inefficient. For example, to read data 0b in double-word addressing memory, byte alignment should be used to obtain the required byte:

1.           Read 0a0b0c0d from address 00.

2.           Mask the data to get 000b0000.

3.           Shift right by 8 bits and load to the destination register.

              However, byte addressing reads 0b from address 01 and loads it to the destination.

              Reading or writing one double word located from byte-boundary in a double word addressing memory is also inefficient. For example, to read double word 0b0c0d0e, the processor should:

1.           Read 0a0b0c0d from address 00.

2.           Shift right by 8 bits.

3.           Read 0e0f1a1b from address 01.

4.           Shift left by 24 bits.

5.           Combine them and load to the destination register.

              However, double-word addressing is used. Additionally, motion estimation (ME) and motion compensation (MC) access data from not-double-word boundaries.

              The reference images of the ME and MC are accessed for every 8 x 8 data blocks or 4 x 4 data blocks, which result in some problems, including:

•             The starting addresses of those blocks are not always at the double word boundary. The byte alignment must be done by software or the wrong data are fetched. For example, the ME or MC may start to read data from the second-most-significant byte of the address.

•             The accessed blocks are not bound together but are scattered. The starting offset of a block could be the second, third, or fourth byte of a double word. The different start bytes require different approaches t...