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Current Mode Low Power Adjustable Driver

IP.com Disclosure Number: IPCOM000029804D
Publication Date: 2004-Jul-13
Document File: 2 page(s) / 17K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method that uses a current mode driver that can be adjusted by controlling the number of current source legs that are configured in parallel.

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Current Mode Low Power Adjustable Driver

Disclosed is a method that uses a current mode driver that can be adjusted by controlling the number of current source legs that are configured in parallel.

Background

Voltage mode CMOS drivers are currently in use, but do not lend themselves to real gains on the low speeds a DDR2 operates at. For future designs, differential current mode drivers are the preferred choice, because their signaling speeds increase beyond the DDR3 architectures and the power to compensate for transmission loss becomes a larger concern. Existing DRAM architectures do not adjust I/O settings, since the signaling margins are directly tied to I/O impedance. With differential or single-ended current mode drivers, the drive strength can be adjusted without modifying the termination. For different routing lengths (such as FBD DIMM) there is an opportunity to save power by designing the I/O to optimize based on the DRAM-Buffer location. Since the primary power on the I/O is analog, the driver legs can improve the power significantly.

General Description

The FBD module adheres to a specified layout and size, depending on industry platforms. These specifications limit the routing options available on the module. Likewise, the compaction of the layer count and module height results in constrained board routing.  Since FBD is a fixed DIMM, the routing post buffer-DRAM is also fixed; therefore, knowledge of the bus length vs DRAM is known a priori. 

Given these circ...