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Method for bilinear interpolation for parallel data-driven architecture

IP.com Disclosure Number: IPCOM000029814D
Publication Date: 2004-Jul-13
Document File: 6 page(s) / 62K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method for bilinear interpolation for parallel data-driven architecture. Benefits include improved performance and improved design flexibility.

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Method for bilinear interpolation for parallel data-driven architecture

Disclosed is a method for bilinear interpolation for parallel data-driven architecture. Benefits include improved performance and improved design flexibility.

Background

              Bilinear interpolation (zoom) is one of the most common algorithms used in still image and video processing. It is used to change the size of an image while retaining good image quality.

General description

              The disclosed method is an efficient implementation of the bilinear interpolation algorithm of a multiple instruction multiple data (MIMD) parallel programmable media architecture. Bilinear interpolation determines the value of a new pixel from the weighted average of the four neighbor pixels closest to the specified input coordinates for color images this process is repeated for each color plane. The bilinear interpolation algorithm is used for zooming (scaling) an image in and out.

Advantages

              The disclosed method provides advantages, including:

•             Improved performance due to taking full advantage of all processing elements running in parallel

•             Improved design flexibility due to providing two implementations

Detailed description

              The disclosed method includes a bilinear interpolation algorithm (see Figure 1). The new pixel, P, is located with respect to its four closest original pixels. The value of P is computed by interpolation as follows:

P12 = (1 – dx)P1 + dxP2

P34 = (1 - dx)P3 + dxP4

P = (1 – dy)P12 + dyP34 = (1 – dx)(1-dy)P1 + dx(1 – dy)P2 + (1 – dx)dyP3 + dxdyP4

              Two implementations of the disclosed method are described below, the planar implementation and the alternative interleaved implementation.

 


Planar implementation

              A planar implementation of the bilinear interpolation processes one of the red, green, and blue (R, G, and B) color planes at a time. The data is stored in random access memory (RAM, see Figure 2).

              The bilinear interpolation zoom function uses a image signal processor (ISP). Five processing elements run in parallel:

•             Input processing element (IPE)

•             Output processing element (OPE)

•             2 Multiplier accumulator processing elements (MACPEs, designated as MACPE2 and MACPE3)

•             General processing element (GPE)

•             Memory controller hub (MCH) RAM

              Initially, the following parameters required for the algorithm implementation are precalculated and prestored in MCH RAM:

•             Input image width
•             Output image width
•             Zoom ratios (in X and Y directions)
•             Parameters for padding the output width to the d-word boundary

              IPE uses the image input width to transfer one row at a time into MCH RAM. However, the algorithm requires two rows at a time in MCH RAM (to have four neighborhood pixels). As a result, two rows are transferred into MCH. The third row of data is prestored in MC...