Browse Prior Art Database

Voltage Supply Threshold Detector

IP.com Disclosure Number: IPCOM000031455D
Published in the IP.com Journal: Volume 4 Issue 10 (2004-10-25)
Included in the Prior Art Database: 2004-Oct-25
Document File: 6 page(s) / 87K

Publishing Venue

Siemens

Related People

Juergen Carstens: CONTACT

Abstract

When an electronic device is powered up, the internal circuitries can assume different initial states. Often parasitic elements determine the states after the power-on. For assuring that circuitries assume a defined initial state, generally a 'Power On Reset'-signal is required. Additionally, a reset signal typically exists for keeping the digital units in a reset state until the power line exceeds a predetermined threshold voltage. For many cases, like Power MOS driving, an internal voltage monitoring apparatus is mandatory to avoid an irreversible damage to the application circuit. In Figure 1 a typical use case is depicted, a high speed driver with bootstrapping for dual power MOSFETs. Figure 2 shows the main structure of the bias unit, which generates all the internal voltage supplies and a logic level signal (ENAble). Essentially the TGATE and BGATE are turned off until ENA is low. If at the startup Vcc increases abruptly, the sensing point at the R1-R2 resistor divider might ramp up faster than the band gap voltage reference (as a consequence of the internal setting time). As a result, a wrong enable signal may cause the driving stage to switch on, although the nominal current and voltage supplies are not yet reached, leaving the device in an undefined and potentially dangerous state. Therefore, usually an 'AND'-combination of the battery sense detector output (UV) and the internal 'Power On RESET'-signal (RESET) of the avdd bias (analog supply) is introduced, which then provides the general reset signal for the whole system. Thus, the 'AND'-combination of the two signals avoids the triggering of a false ENA-signal during fast input voltage transition at the power on/off. As illustrated in Figure 3, the RESET does not release any signal before the analog voltage supply crosses the 4.1V threshold.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 43% of the total text.

Page 1 of 6

S

Voltage Supply Threshold Detector

Idea: Riccardo Pittassi, IT-Padova

When an electronic device is powered up, the internal circuitries can assume different initial states. Often parasitic elements determine the states after the power-on. For assuring that circuitries assume a defined initial state, generally a 'Power On Reset'-signal is required. Additionally, a reset signal typically exists for keeping the digital units in a reset state until the power line exceeds a predetermined threshold voltage. For many cases, like Power MOS driving, an internal voltage monitoring apparatus is mandatory to avoid an irreversible damage to the application circuit. In Figure 1 a typical use case is depicted, a high speed driver with bootstrapping for dual power MOSFETs. Figure 2 shows the main structure of the bias unit, which generates all the internal voltage supplies and a logic level signal (ENAble). Essentially the TGATE and BGATE are turned off until ENA is low.

If at the startup Vcc increases abruptly, the sensing point at the R1-R2 resistor divider might ramp up faster than the band gap voltage reference (as a consequence of the internal setting time). As a result, a wrong enable signal may cause the driving stage to switch on, although the nominal current and voltage supplies are not yet reached, leaving the device in an undefined and potentially dangerous state. Therefore, usually an 'AND'-combination of the battery sense detector output (UV) and the internal 'Power On RESET'-signal (RESET) of the avdd bias (analog supply) is introduced, which then provides the general reset signal for the whole system. Thus, the 'AND'-combination of the two signals avoids the triggering of a false ENA-signal during fast input voltage transition at the power on/off. As illustrated in Figure 3, the RESET does not release any signal before the analog voltage supply crosses the 4.1V threshold.

A very simple implementation of such a 'Reset Functionality' is illustrated in Figure 4, where the trip point generator is a single CMOS threshold voltage or a stack of CMOS threshold voltages. The current consumption is properly limited by a simple resistor. Unfortunately, the accuracy of this solution is strongly dependent on several physical and process-oriented parameters (temperature, impurity, drift, and aging). In the following, a new method for providing a regulated, temperature independent voltage supply (VS) in combination with a precise threshold detector is proposed. Furthermore, the solution has the advantage that no additional voltage comparator is required.

The method is based on a bandgap circuit (disclosed in "A Simple Three-Terminal IC Bandgap Reference", IEEE JSSC Vol. SC-9, N°. 6, Nov. 1974). This is sketched in Figure 5 (start up circuit has been omitted). In a steady state condition, when Vout has reached the regulated value, the currents I1 and I2 carried by the transistor pair T1 and T2 are forced to be equal due to the negative voltage lo...