Browse Prior Art Database

440GP/440GX Real-Time Serial Bootstrapping Manipulation

IP.com Disclosure Number: IPCOM000031602D
Original Publication Date: 2004-Sep-30
Included in the Prior Art Database: 2004-Sep-30
Document File: 2 page(s) / 75K

Publishing Venue

IBM

This text was extracted from a PDF file.
This is the abbreviated version, containing approximately 71% of the total text.

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440GP/440GX Real-Time Serial Bootstrapping Manipulation

This invention makes PowerPC* 440 embedded processor easier to use through increased serial bootstrapping flexibility. The PowerPC 440 processor uses an IIC-based serial EEPROM to configure the processor hardware out of reset, but bits in this serial EEPROM cannot be easily modified in real time. Many processors have data bits that can be strapped high or low (like PowerPC 405). To make a change in serial bootstrapping assumes that you can bring the processor up and usually a high-level software program can then reprogram the serial EEPROM (or physically replace a socketed EEPROM). With this invention, real time manipulation of this serial EEPROM stream can take place, enabling strapping fields to control processor and enabling quicker and easier end user flexibility.

     This design uses complex programmable logic device (CPLD) which is usually present for glue logic in a system design, but it could be a problem if there is no CPLD available or existing CPLD does not have available resources for this function, then it would make this solution more difficult to implement.

     This method of manipulating serial EEPROM is implemented on Branch card which is a PCI-X adapter with 440GX, and it is used to select PCI modes of operation which are not be known at time of shipping to end user.

     This invention uses CPLD to manipulate serial data based on strapping field input to real-time change serial configuration of PowerPC...