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Method for software assisted trick modes for simple digital-video hardware decoders

IP.com Disclosure Number: IPCOM000032357D
Publication Date: 2004-Nov-02
Document File: 3 page(s) / 51K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method for software assisted trick modes for simple digital-video hardware decoders. Benefits include improved functionality and improved performance.

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Method for software assisted trick modes for simple digital-video hardware decoders

Disclosed is a method for software assisted trick modes for simple digital-video hardware decoders. Benefits include improved functionality and improved performance.

Background

              A digital set-top box can be designed with only a processor that performs all the video decoder stages in software. However, to provide the required high-quality playback using this software-based decoder approach, a more powerful processor is required that may not meet power consumption, thermal, or cost requirements.

              Alternatively, designs for digital set-top boxes may include a low processing power system-on-a-chip processor, and decode the video stream entirely in hardware. These video coprocessors typically implement only simple trick modes, if they implement any at all, such as fast forward, rewind, and pause.

              When a video decoder implements simple trick modes, it typically begins to discard “P” and “B” frames entirely, and displays only the “I” frames. This approach provides a rather blocky, jerky fast forward because only 1/15 of the video information is being presented to the user, though at a faster rate[DB1] .

              Additionally, when a video decoder implements simple pause, it replays the last two fields over and over. In an interlaced display, any motion present in the scene causes an irritating flicker due to the interlaced motion being display back and forth.

              Some software video decoding playback solutions include offloading certain portions of the video processing pipeline to hardware acceleration units. Examples include color space conversion, scaling, motion compensation, and inverse discrete cosine transforms. These solutions offload portions of the video decoding pipeline 100% of the time during playback.

              Some digital set-top boxes implement an all or nothing approach for video decoding. They either use a full software stack, which implements all playback in software, or decodes all video in hardware.

General description

              The disclosed method uses a combination of a simple video coprocessor for performing the normal video decode function and a lower-end processor, which provides enhanced video trick modes in software. For normal viewing, the video coprocessor  entirely performs the video decode. This hybrid scheme potentially provides the best cost/performance trade-off. The spare processing cycles enhance the end-user experience.

Advantages

              The disclosed method provides advantages, including:

•             Improved functionality due to providing a combination of a lower-end processor and a simple video coprocessor for processing streaming digital video

•             Improved performance due to enabling a lower-e...