Browse Prior Art Database

Parallel Multi-port Adapter Power On Self Test

IP.com Disclosure Number: IPCOM000032410D
Original Publication Date: 2004-Nov-03
Included in the Prior Art Database: 2004-Nov-03
Document File: 1 page(s) / 27K

Publishing Venue

IBM

Abstract

This invention allows a multi-port adapter to test each port in the POST, Power On Self Test, in parallel.

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This is the abbreviated version, containing approximately 65% of the total text.

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Parallel Multi-port Adapter Power On Self Test

Disclosed is a method to test each port on a host adapter in the POST, Power On Self Test, in parallel.

As adapters continue to increase the number of ports on the card, the time to run a Power On Self Test (POST) on the card takes longer and longer. Since the POST can run at power on or during normal customer operation during error recovery, it is important to not grow the time to run the POST exponentially even though the number of ports increase. One possible solution to reducing the time to run the POST is to test less in the POST. However, that reduces what hardware problems the POST can detect. A better solution to reduce the time to run the POST is to test the ports in parallel.

The host adapter can support the Fibre Channel optical communication protocol. However, the host adapter may be used to support other protocols including, but not limited to, Internet Small Computer Interface (iSCSI), Fibre Channel over IP (FCIP), Enterprise Systems Connection (ESCON), InfiniBand, and Ethernet.

In one embodiment, the host adapter has more than one port and only one main processor. In one embodiment, the port POST is run by sending a request to the port mailbox and then later on the host adapter main processor can check the port mailbox to see if the port POST passed.

Currently, one port starts its POST, a delay occurs, and then the host adapter main processor checks the results. Then, the next port starts its POST, a d...