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Method and Apparatus for Designing Flexibility Into Key Chip and System Parameters Using a Software Controlled Clock Generator

IP.com Disclosure Number: IPCOM000032710D
Original Publication Date: 2004-Nov-10
Included in the Prior Art Database: 2004-Nov-10
Document File: 3 page(s) / 54K

Publishing Venue

IBM

Abstract

The core idea of this invention is to take existing software controlled clock generator circuits and design them to respond to system/chip parameters so the actual system/chip products can be tailored on the fly to achieve its unique optimal performance. Examples of system/chip variables benefiting from this hardware flexibility are frequency, power, Vdd voltage, junction temperature, spread spectrum, and DRAM errors.

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Method and Apparatus for Designing Flexibility Into Key Chip and System Parameters Using a Software Controlled Clock Generator

I n today's highly competitive computer market, be it games boxes or supercomputers, any idea which may improve their time to market and/or overall system performance is worthwhile. This idea positively impacts either or both areas by incorporating an on-chip software controlled clock generator designed to respond to key chip/system parameters by optimizing or trading off clock frequency. Some examples of key chip and system parameters which may influence clock frequency are chip process point, power/voltage, junction temperature, DRAM errors, and spread spectrum requirements. Currently, most system/chip designs require targets for these parameters early on in the design phase. A great deal of time and money is spent setting and meeting these targets. However, not only has it become extremely difficult to predict the right targets well in advance of general availability (GA), but attempting to meet these targets for a worse case design has also become prohibitive from a schedule/cost perspective. Built-in flexibility is now required for these key chip/system parameters allowing for their change and optimization beyond completion of the design phase. This idea builds in this flexibility on a per chip/system basis using on-the-fly optimizing or trading off chip/system frequency depending on desired parameter values.

     The core idea of this invention is to take existing software controlled clock generator circuits and design them to respond to system/chip parameters so the actual system/chip products can be tailored on the fly to achieve its unique optimal performance. Such system/chip variables benefiting from this hardware flexibility are frequency, power, Vdd voltage, junction temperature, spread spectrum, and DRAM errors. For example, consider the current method for incorporating spread spectrum. A spread spectrum generator must be chosen, either as a separate chip in a system, or as a special clock generator on chip that is capable of generating spread spectrum. These options typically allow for a limited range of spread frequencies, and for a very limited choice of spread profiles (triangle, Hershey's Kiss*, sine, etc). The key system parameters in this case are spread frequency (period) and profile. Software control and feedback on these variables would allow for a wide range of programmable spread spectrum profiles, not just a fixed selection. This would help with reducing system noise and electromagnetic (EM) radiation.

     Another example is self-sorting chips. The key chip parameter in this case is the silicon process. Typically, up front frequency or power targets are established, and based on wafer and/or module level tests, chips are placed into their appropriate frequency or power bucket. To determine the individual chip processing point, wafer tests rely on an on-chip process monitor circuit and mod...