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Placement of Fibre Channel Loads to Optimize Power Sequencing for Availability

IP.com Disclosure Number: IPCOM000032753D
Original Publication Date: 2004-Nov-11
Included in the Prior Art Database: 2004-Nov-11
Document File: 2 page(s) / 141K

Publishing Venue

IBM

Abstract

The Power Supply capacity design requirements are constrained by the capacity required to supply the load under the most demanding conditions. For disk enclosures the worst case conditions are during the power on phase where the starting currents for the disk drive modules (DDMs) must be supplied, the normal running current requirements are far less than requirements to support the DDM motor starting surge requirements. In order to support limiting the power supply capacity the SFF-8045 Specification section 6.4.6 allows for implementing a staggered starting sequence for DDMs (power supply loads) by setting the values of the START_2/MATED & START_1/MATED interface bits. This can result in a delay in starting the DDM motor loads due to the starting sequence algorithm. By designing the DDM interface to the system, and the system DDM population ordering rules such that the starting sequence rules power on the DDM slots in an optimal order, the system startup time can be optimized.

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Placement of Fibre Channel Loads to Optimize Power Sequencing for Availability

Disclosed is a system that optimizes the starting sequence of DDMs within an enclosure that when combined with the enclosure HDD population rules makes the devices available as fast as possible, within the power supply design constraints. This combination of control, DDM motor sequencing, and population ordering rules makes smaller configurations available to the DDM protocol interface ready for read/write operations as soon as practical while maintaining reasonable power system design capacity and therefore cost constraints. The DDM system interface design took into account system DDM population ordering rules to optimize the starting sequence which results in a non-obvious SEL_ID bit pattern on the midplane DDM interface.

This method utilized the defined behaviors of the start_2/mated & start_1/mated interface bits to create a combinatorial method of DDM motor sequencing; some of the DDM slots have their midplane signals wired such that the DDM motors will start immediately after deskew when power is applied with the remainder sequenced leveraging the modulo of 8 behavior defined in SFF-8045. This combinatorial approach allows the overall system design to be optimize from a hardware perspective (power supply power output capacity is optimized for system) and a device availablity point of view (the combination of starting sequence and enclosure population ordering rules) allows the de...