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Integration of a Barrier Layer Overlying Large Copper Pads without Patterning Step

IP.com Disclosure Number: IPCOM000032869D
Original Publication Date: 2004-Nov-16
Included in the Prior Art Database: 2004-Nov-16
Document File: 4 page(s) / 441K

Publishing Venue

Motorola

Related People

Gregor Braeckelmann: AUTHOR [+3]

Abstract

A novel integration path forming a barrier layer overlying copper has been studied. This integration pertains to large copper areas such as bond pads at the last metal level or metal-insulator-metal (MIM) capacitor structures. For these structures a barrier layer is needed passivating the copper film. In order to reduce cost and process complexity no additional patterning step (photo/etch) is needed for its formation. The barrier is rather formed by immediate deposition on the electroplated and annealed copper film. After chemical-mechanical-polishing (CMP) the barrier is left behind in the large structures only where it is needed. This barrier scheme provides excellent protection for bondpads before aluminum or chromium deposition, and a smooth layer as it is required for MIM capacitors. This paper describes the integration and application of a barrier overlying Cu pads and provides an integration path without additional patterning step.

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Integration of a Barrier Layer Overlying Large Copper Pads without Patterning Step

Gregor Braeckelmann, John McGinley, Saifi Usmani

Abstract

A novel integration path forming a barrier layer overlying copper has been studied.  This integration pertains to large copper areas such as bond pads at the last metal level or metal-insulator-metal (MIM) capacitor structures.  For these structures a barrier layer is needed passivating the copper film.  In order to reduce cost and process complexity no additional patterning step (photo/etch) is needed for its formation.  The barrier is rather formed by immediate deposition on the electroplated and annealed copper film. After chemical-mechanical-polishing (CMP) the barrier is left behind in the large structures only where it is needed.  This barrier scheme provides excellent protection for bondpads before aluminum or chromium deposition, and a smooth layer as it is required for MIM capacitors. 

This paper describes the integration and application of a barrier overlying Cu pads and provides an integration path without additional patterning step.

Introduction

With the use of copper (Cu) as interconnect material of choice in the semiconductor industry, the development of barrier layers encapsulating the copper material became of great importance.  In the formation of Cu interconnects, using a (dual) inlaid process flow, a conducting barrier layer (typically Ta based) is formed at the bottom and sidewalls of vias and trenches before Cu deposition.  A dielectric barrier (silicon nitride, or silicon carbon nitride) is formed on top, resulting in the complete encapsulation of all Cu material.  

For certain applications, however, it is necessary or desirable to use a conducting Ta based layer not only on bottom and sidewalls but also overlying the Cu.  For example at the last metal level before contacting the Cu bondpads during packaging a conducting barrier is required passivating the Cu.  This is typically achieved by depositing a blanket barrier layer (and Al) followed by patterning of the metal. 

Another example are MIM capacitors where large, flat Cu pads are used to form capacitor structures.[1]  An extremely smooth Cu surface is needed for these capacitors to achieve the stringent requirements for breakthrough voltage. However, using Cu interconnects low breakthrough voltages are being observed. This is attributed to Cu hillocks, which cause the early breakthrough.  Hillock formation is a well-known phenomenon for Cu interconnects; they form especially during heat treatment and are due to microstructure change (grain growth; grain push-out) and stress effects during annealing.  Different solutions were already proposed to address this problem.[2],[3]

We describe here an integration, which forms a barrier overlying large Cu areas such as bondpads or flat capacitor structures. 

Description of Process Flow

1. Metal-Insulator-Metal Structure

As mentioned above, a very smooth Cu surface is nee...