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Method for a package substrate fabrication process using soft lithography

IP.com Disclosure Number: IPCOM000033144D
Publication Date: 2004-Nov-29
Document File: 6 page(s) / 114K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method for a package substrate fabrication process using soft lithography. Benefits include improved functionality, improved performance, improved yield, and improved throughput.

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Method for a package substrate fabrication process using soft lithography

Disclosed is a method for a package substrate fabrication process using soft lithography. Benefits include improved functionality, improved performance, improved yield, and improved throughput.

Background

      Substrate imprinting technology is a process for package substrate fabrication. The circuitry pattern is directly printed into the dielectric layer by imprinting a build-up layer using a hard microtool typically made out of nickel (see Figure 1). After imprinting, the dielectric layer is cured to form a rigid pattern. Cu plating follows to form the electrical connection through vias.

      The following technological challenges have been identified:

•             Durable microtool with good qualify parameters are difficult and expensive to make.

•             During imprinting, microtool may hit the rigid core, damaging via pins and/or core (see Figure 3).

•             During imprinting, the microtool can wear due to the abrasiveness of fillers in the dielectric layer.

•             Difficulty can occur in the microtool release from the dielectric layer because of the high surface energy of the microtool, which is typically made of nickel.

•             Imprinting process can leave behind a considerable amount of chad at the bottom of the via due to the nature of the process (see Figure 2)

•             Difficulty in controlling final shape of dielectric layers because imprinting process simply displaces materials (total volume is conserved). Sometimes, imprinted features are washed out.

•             Imprinting process optimization is difficult because both curing reaction and material flow take place during the imprinting operation.

      Conventionally, the problem is solved by:

•             Microtool issues are unsolved and potential show-stoppers.

•             Reactive plasma etching process is used for chad removal.

•             Expensive and sophisticated computer simulation is used for process optimization.

General description

      The disclosed method is a substrate fabrication process using a soft lithography technology for substrate fabrication.

              The key elements of the method include:

•             Durable, economical, and easy-to-make stamper or mold made from elastomers, such as polydimethylsiloxane (PDMS)

•             Exact circuitry pattern transfer using a dielectric material-filled stamper or mold

•             Pattern transfer accomplished without applying pressure and damaging core because no dielectric material is flowing during the pattern transfer

•             Exact pattern replicated on the core or dielectric layer

•             Easy release of mold or stamper

Advantages

              The disclosed method provides advantages, including:

•             Improved functionality due to providing a soft lithography micromold using cast molding

•             Improved performance due to creating minimal residual material or chad

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