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Mechanism for Supporting Out of Band Configuration of BIOS Settings

IP.com Disclosure Number: IPCOM000033503D
Original Publication Date: 2004-Dec-13
Included in the Prior Art Database: 2004-Dec-13
Document File: 1 page(s) / 22K

Publishing Venue

IBM

Abstract

System administrators require the ability to configure CMOS settings remotely without taking the operating system out of service. Currently, it may be possible to accomplish this goal in one of the following two ways: 1) An out of band management device such as a service processor could maintain a copy of a subset of the CMOS settings. A user would then modify this copy of the settings through a user interface provided by the service processor. During POST, BIOS could query the value of these settings from the service processor. The major drawbacks of this implementation is consistency issues related to having multiple copies of the settings. 2) An application running within the host OS capable of modifying the settings could be used. This application could be accessed by a remote console provided by the operating system. The major drawback of this implementation is that it requires an application within the host operating system. This introduces all of the standard support issues related to supporting multiple OS distributions. This article describes a solution to this problem which utilizes communications between a service processor and BIOS via the SMI handler to directly modify the CMOS settings. This addresses the major drawback of each of the implementations above. Only one copy of the settings is maintained and there is no requirement for an application within the host OS.

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Mechanism for Supporting Out of Band Configuration of BIOS Settings

     An implementation of this solution is as follows. A network addressable service processor provides a user interface (for example via a web server or CLI) that exposes CMOS settings such as the boot sequence or PXE settings. When an administrator invokes the user interface, the service processor will set mailbox values indicating the values to be read from CMOS. The service processor will then generate an SMI. This will cause BIOS's SMI handler to be invoked. The SMI handler will then read the values from CMOS and write them to NVRAM on the service processor. The service processor will then interpret this raw data and display it in the user interface. If the administrator modifies settings through the user interface, the service processor will copy the new values to the mailbox. The service processor will again generate an SMI causing the SMI handler to be invoked. The SMI handler will recognize this is a write operation and update the settings in ROM.

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