Browse Prior Art Database

Stacked Scan Collar Flip Flops

IP.com Disclosure Number: IPCOM000033792D
Publication Date: 2004-Dec-28
Document File: 1 page(s) / 76K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method that uses multiple flip flops per signal on a scan collar to provide multiple sets of data during a single scan capture cycle.

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Stacked Scan Collar Flip Flops

Disclosed is a method that uses multiple flip flops per signal on a scan collar to provide multiple sets of data during a single scan capture cycle.

Background

Current scan collar design tools and architectures do not allow for back-to-back write/read and read/write operations using scan cells; the scan collar designs allow one flip flop per signal.  Multiple control lines have been used, but as the number of memories per device increases, these designs suffer from area and pin issues.

General Description

The disclosed method adds flip flops to a memory scan collar to allow for improved memory scan testing. It provides back-to-back write/read and read/write operations using scan cells.   Data is loaded into multiple flip flops for the same signal, so that more than one set of data are provided to the memory signal within a single scan capture cycle (see Figure 1).

Advantages

The disclosed method improves the quality of testing by allowing for back-to-back write/read and read/write operations; without this enhancement, the detection of various types of defects is not possible.

Fig. 1

Disclosed anonymously