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Solder Bump Flattening During Electrical Testing

IP.com Disclosure Number: IPCOM000033852D
Publication Date: 2004-Dec-30
Document File: 2 page(s) / 45K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method that uses the pogo pins of the electrical test socket to flatten the solder bumps during electrical testing. Benefits include eliminating the need for an independent solder bump flattening process.

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Solder Bump Flattening During Electrical Testing

Disclosed is a method that uses the pogo pins of the electrical test socket to flatten the solder bumps during electrical testing. Benefits include eliminating the need for an independent solder bump flattening process.

Background

Currently, solder bump flattening is an independent process. The substrate/PCB solder bumps are flattened using tools made specifically for flattening (see Figure 1).

General Description

The disclosed method uses the electrical test (e-test) machine to perform solder bump flattening. The following are details of the disclosed method:

§         The e-test machine applies pressure to each bump during testing. This pressure can be optimized.

§         The e-test machine applies temperature to each bump during testing. This temperature can be optimized.

§         To achieve a good co-planarity of the flattened bumps, the pogo pin and socket are designed to allow a maximum pin travel distance while pressure is applied.

§         The material of the pogo pins is similar to the flattening plate material.

§         The time of the e-test (per unit) is similar to the time for flattening each unit.

Figure 2 shows the bump flattening process during e-testing

Advantages

The disclosed method eliminates the need for an independent solder bump flattening process.

 

Fig. 1

Fig. 2

Disclosed anonymously