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Method for a silicon packaging substrate restrainer with thermal conducting capabilities

IP.com Disclosure Number: IPCOM000033855D
Publication Date: 2004-Dec-30
Document File: 5 page(s) / 117K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method for a silicon packaging substrate restrainer with thermal conducting capabilities. Benefits include improved functionality and improved reliability.

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Method for a silicon packaging substrate restrainer with thermal conducting capabilities

Disclosed is a method for a silicon packaging substrate restrainer with thermal conducting capabilities. Benefits include improved functionality and improved reliability.

Background

              Silicon packaging substrate can warp or bend in a flip-chip desktop/server microprocessor.

The substrate and silicon can interact and cause stress to be induced in and transferred to the weaker silicon when the substrate warps.

              The new generation microprocessor with high electrical performance utilizes low dielectric constant (low-k) dielectric material with lower mechanical strength than previous technologies. The conventional packaging solution exposes the silicon to a risk of thermomechanical interaction, resulting from differences in coefficient of thermal expansion (CTE) between the substrate and silicon. The CTE of the packaging substrate is ~17 x10-6m/°C. The CTE of Si is ~3x10-6m/°C. The difference in the CTE values causes the substrate to warp more than silicon, transferring the stresses to the silicon and causing failure to the weak interfaces, particularly the low-k dielectric layer. This stress transfer occurs more with the higher temperature required for lead-free packaging, exposing the overall product packaging to a higher CTE mismatch risk.

      Silicon failures have increased for bare-die units (units without an attached IHS). Need to check

              No specific solution exists. The silicon on the conventional desktop/server flip-chip product is covered by an integrated heat spreader (IHS) designed specifically for thermal dissipation only (see Figure 1). The IHS does not provide enough mechanical support to prevent substrate warpage due to the CTE mismatch.

General description

      The disclosed method is a restrainer comprised of base plates (of any material) attached to the packaging substrate to minimize substrate warpage. The method protects the weaker silicon from thermomechanical failure by limiting (if not eliminating) the substrate warpage. Additionally, the disclosed method provides a larger contact area to dissipate the heat from the silicon.

              The key elements of the method include:

•             Base plate with insulated holes for substrate pins (to prevent electrical shorting) that connect to another metal plate to act as a clamp (top and bottom) to the packaging substrate to prevent thermomechanical warpage

•             Restrainer for thermal dissipation, replacing the IHS

Advantages

              The disclosed method provides advantages, including:

•             Enable next generation product as current technology is hitting the technology limitation when we try to improve the...