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Method for a grid reference plane for on package passive devices

IP.com Disclosure Number: IPCOM000033859D
Publication Date: 2004-Dec-30
Document File: 3 page(s) / 61K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method for a grid reference plane for on package passive devices. Benefits include improved performance.

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Method for a grid reference plane for on package passive devices

Disclosed is a method for a grid reference plane for on package passive devices. Benefits include improved performance.

Background

      Reference plane metal loss is due to eddy currents introduced by the voltage on passive devices. If the current on the reference plane cannot flow, the loss is minimized. The shielding structure is not required to be solid. Theoretically, a gap of less than ¼ wavelength should be sufficient to block incoming electromagnetic noises.

              Package-level passive devices, such as inductors and transformers, have high noise levels if no shielding or reference structures are implemented. However, if solid metal planes cover the passives, extra metal loss and parasitic capacitance are introduced and the Q-factor is decreased.

      On-package passive devices have better performance and lower cost than those built on the die. However, if no reference planes occur at the top and bottom of the passive devices, the overall noise level is quite high. Moreover, if a system-in-a-package (SiP) type of packaging approach is applied, the digital-to-analog noise is very high and passive devices without shielding is prohibitive. Adding shielding is straightforward. However, shielding introduces extra metal loss and degrades the performance of the passive devices (see Figure 1).

      Conventionally, the problem is solved by placing passive devices on a thicker layer to reduc...