Browse Prior Art Database

# Low Power Accurate Power-On Detector

IP.com Disclosure Number: IPCOM000033931D
Publication Date: 2005-Jan-05
Document File: 8 page(s) / 72K

## Publishing Venue

The IP.com Prior Art Database

This text was extracted from a Microsoft Word document.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 53% of the total text.

Title: Low Power Accurate Power-On Detector

Key Words

Integrated circuit, power-on, detection, power consumption reduction

Background

Integrated circuits often require a power-on detection circuit to put circuits in the correct initial states as well as determine when power voltages are high enough that circuits can begin operation.  Many IC’s are used in systems which require system power consumption to be as low as possible under all conditions.  This invention is a small accurate low power consumption power-on circuit that is significantly less complex and uses much less power than prior art circuits.

Detailed Description of the Drawings

Figure 1 shows the schematic of a power-on detection circuit used in prior integrated circuits.  Figure 2 is a graph of Power Voltage and Power-On Output Signal versus Power Voltage for this prior art  circuit.  It can be seen in Figure 2 that the Power-On Output Signal transition is “soft”, that is, the Output Signal voltage starts to transition from 0 volts at about Power Voltage = 3.6 volts and does not complete the transition to a “high” output until Power Voltage = 5 volts.  The Power-On Output Signal would generally be connected to a logic gate with an input threshold of about one-half of the Power Voltage.  Process variations in the manufacture of the integrated circuits will cause variations in the input threshold of that next logic gate and therefore cause variations in the Power Voltage at which subsequent stages of logic respond to the Power-On Output Signal.

Figure 3 shows a first embodiment of a new power on circuit.  Figure 4 is a graph of Power Voltage and Power-On Output Signal versus Power Voltage for the new circuit of Figure 3.  It can be seen in Figure 4 that the Power-On Output Signal transition is “sharp”, that is, the Output Signal has a very steep transition and transitions from 0 volts to a “high” right at Power Voltage = 4.1 volts.  Therefore variations of the input threshold of that next logic gate will not cause variations in the Power Voltage at which subsequent stages of logic respond to the Power-On Output Signal.  Thus, Power-On detection level will be more accurate with the new circuit of Figure 3 than with prior art.

Additionally, the circuit of Figure 3 consume...