Browse Prior Art Database

Cost-Effective ALU Multiplier Combination

IP.com Disclosure Number: IPCOM000034151D
Original Publication Date: 1989-Jan-01
Included in the Prior Art Database: 2005-Jan-26
Document File: 4 page(s) / 40K

Publishing Venue

IBM

Related People

Funk, MR: AUTHOR [+3]

Abstract

This combination, based on a unique set of control hooks, efficiently shares fixed point logic with floating point logic with little overhead cost to either, and provides a necessary boost in floating point performance. The ALU/Shifter in the processor chip is the focus of this process. The processor performs twice as fast as its predecessor in fixed point operations and three to four times as fast in floating point/multiply instructions. Because it is important to fit the floating point/multiply (here- after referred to as scientific) logic in as small a space as possible, this method shares the fixed point logic already on the chip with the scientific logic. Yet the importance of performance forced the development of a novel data flow.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 32% of the total text.

Page 1 of 4

Cost-Effective ALU Multiplier Combination

This combination, based on a unique set of control hooks, efficiently shares fixed point logic with floating point logic with little overhead cost to either, and provides a necessary boost in floating point performance. The ALU/Shifter in the processor chip is the focus of this process. The processor performs twice as fast as its predecessor in fixed point operations and three to four times as fast in floating point/multiply instructions. Because it is important to fit the floating point/multiply (here- after referred to as scientific) logic in as small a space as possible, this method shares the fixed point logic already on the chip with the scientific logic. Yet the importance of performance forced the development of a novel data flow. The final result is an ALU shifter pairing along with many new control hooks to enhance scientific operations. Other ideas, while not new in and of themselves, are particularly cost effective in this design. Most solutions to scientific operations involve adding separate logic to the system. The fastest multipliers are hardwired, or pipelined, which was too expensive to consider. The alternative taken here is to microcode floating point operations on the available fixed point hardware. Scientific operations can be performed as a series of adds and shifts. Here, the adds and shifts occur in the same cycle. A data-dependent variable multiply step shifter on the OUTPUT of the ALU is employed. This same shifter serves as the system shifter during HMC shift control words and also supports Full Word Moves so there is very little inefficiency. In addition, to further enhance floating point performance, some bit stripping controls into the existing ALU/shift data flow are added. All of the new logic is controlled by HMC and fits within the rest of the processor's cycle time requirements. These, together with some microcode branch and control logic, formulate this process. The new HMC controls and branch conditions, together with this way of organizing the ALU/shifter, provide sufficient scientific assists, meet cycle time, and add little cost overhead to the data flow chip. A key aspect of this process consists of an ALU feeding a shifter, allowing an add/shift function in a single cycle. The same ALU does arithmetic operations, shifts, decimal operations, fullword moves, and multiply functions via the add-shift combination. To effectively utilize the hardware, HMC is given a new data- dependent shift function called SRLSH (shift right by length of shift). This function concatenates half of the shifter input data with an additional halfword of ALU data and shifts the data according to the contents of the multiplier register. This allows an add-shift to pass over running zeros. Thus, a performance improvement is obtained over add-shift for small operands, and, in general, whenever strings of zeros occur in the multiplicand. MLA Microcode multiply look-ahead branche...