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Current Sense Scheme With Fast Restore

IP.com Disclosure Number: IPCOM000034236D
Original Publication Date: 1989-Jan-01
Included in the Prior Art Database: 2005-Jan-27
Document File: 2 page(s) / 52K

Publishing Venue

IBM

Related People

Dussault, RD: AUTHOR [+2]

Abstract

For fast cycle applications, memory array write operations can be restored with small pull-down resistors. Fig. 1 shows an illustration of this fast restore scheme. In the figure, a typical memory cell 1 is connected to the current sense circuit 2 by paths 3 and 4 at the intersections of pull-down resistors R5 and R7 and T3 and T5, respectively. Pull-down resistors R5 and R7 are small, and the sense amplifier voltage bias VSA dictates the bit line voltage levels during standby and during read access. During the write operation, one bit line is pulled up. Thus, the pull-down current is relatively large and, hence, bit line restore can be completed in time for the next cycle read operation.

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Current Sense Scheme With Fast Restore

For fast cycle applications, memory array write operations can be restored with small pull-down resistors. Fig. 1 shows an illustration of this fast restore scheme. In the figure, a typical memory cell 1 is connected to the current sense circuit 2 by paths 3 and 4 at the intersections of pull-down resistors R5 and R7 and T3 and T5, respectively. Pull-down resistors R5 and R7 are small, and the sense amplifier voltage bias VSA dictates the bit line voltage levels during standby and during read access. During the write operation, one bit line is pulled up. Thus, the pull-down current is relatively large and, hence, bit line restore can be completed in time for the next cycle read operation. With the current sense scheme as shown in the figure, the differential voltage across the bit lines during the read operation is generally very small, and so bit lines must be restored quickly after the write operation is completed. In the conventional current sense scheme, R5 and R7 are much larger and the VSA voltage level is much lower. VSA can be the common reference voltage VR. VSA can also be generated from the terminator voltage bias VT through a Schottky Barrier Diode, as shown in Fig. 2. A further alternative is shown in Fig. 3 where the VSA level is controlled by the potential divider of R9 and R10. Other circuit variations are possible for delivering fast restore time as long as the array bit lines can be connected through small ...