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Technique for Dynamic Allocation of Input/Output CONTROL Blocks to an Input/Output DEVICE

IP.com Disclosure Number: IPCOM000034316D
Original Publication Date: 1989-Feb-01
Included in the Prior Art Database: 2005-Jan-27
Document File: 5 page(s) / 77K

Publishing Venue

IBM

Related People

Bourke, DG: AUTHOR [+3]

Abstract

This article describes a method for use in the input/output (I/O) subsystem of a data processing system that provides for dynamic allocation of I/O control blocks always synchronized with the processor program. (Image Omitted) Fig. 1 illustrates a representative set of essential I/O command parameters for starting an I/O operation. The sizes of fields chosen for the illustration is arbitrary. The parameters are: e command byte THE I/O ADDRESS, SPECIFYING THE ADDRESS OF THE TARGET DEVICE. A STORAGE ADDRESS, POINTING TO AN I/O CONTROL BLOCK (IOCB) IN THE main storage of the processor. These parameters are passed to the specified device on the appropriate I/O bus by the processor program.

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Technique for Dynamic Allocation of Input/Output CONTROL Blocks to an Input/Output DEVICE

This article describes a method for use in the input/output (I/O) subsystem of a data processing system that provides for dynamic allocation of I/O control blocks always synchronized with the processor program.

(Image Omitted)

Fig. 1 illustrates a representative set of essential I/O command parameters for starting an I/O operation. The sizes of fields chosen for the illustration is arbitrary. The parameters are: e command byte THE I/O ADDRESS, SPECIFYING THE ADDRESS OF THE TARGET DEVICE. A STORAGE
ADDRESS, POINTING TO AN I/O CONTROL BLOCK (IOCB) IN THE

main storage of the processor. These parameters are passed to the specified device on the appropriate I/O bus by the processor program. On receipt of the command by the device, the processor disconnects and the device proceeds in a manner asynchronous to the processor, fetching the IOCB and carrying out the operation. When the operation is complete, the device reconnects to the processor program by means of an end interrupt. The IOCB shown in Fig. 1 is located in the main storage of the processor and specifies the asynchronous part of the I/O operation. It contains more specific definitions of the operation to be performed, such as definitions of main storage areas for control, data, and status. It has a fixed length of eight words and is read-only by the device. The IOCB is provided with a control field to specify the following: INTERRUPT - 1 BIT COMMAND CHAINING - 1 BIT The Interrupt field has the following meanings assigned to it:

0 - No interrupt (NI) specifies that no interrupt

is to be posted to the program in the processor upon

completion of the operation, unless the operation

incurs an error of termination. If an error of

termination is encountered, an interrupt will always be

posted.

(Image Omitted)

1 - Interrupt (I) specifies that an end interrupt

is to be posted to the program in the processor upon

completion of the operation specified in the IOCB. The

end interrupt signifies that all storage areas

specified in the IOCB will not be accessed by the

device subsequent to posting of the end interrupt. The end interrupts generated by the device are never overlaid in the device by subsequent end interrupts. This rule is in contrast to the program controlled interrupt (PCI) conventions established in other I/O architectures, and provides for unambiguous association of end

1

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interrupts with IOCBs. The command chaining field has the following meanings assigned to it: 0 - End of Chain (EOC) specifies that this IOCB is

the end of chain. No further IOCBs are to be fetched.

An end interrupt is not forced by hardware and is

controlled exclusively by the program by means of the

interrupt bit.

1 - Chain (C) specifies that the chain address

field in this IOCB is a valid IOCB pointer to the next

IOCB in the chain. The next IOCB is ready for use by

the device and will not be further altered...