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Improving Operational Performance of Cache Memories - Branch Protection Through Branch History Tables

IP.com Disclosure Number: IPCOM000034330D
Original Publication Date: 1989-Feb-01
Included in the Prior Art Database: 2005-Jan-27
Document File: 1 page(s) / 12K

Publishing Venue

IBM

Related People

Bennett, BT: AUTHOR [+6]

Abstract

A technique is described whereby branch history table is used to protect against incorrect supervisor program operation, as used in cache memory devices. The concept's implementation of using branch history table (BHT) to prevent unintended branch operations also provides a method of ensuring that the BHT contains only "valid" branch target addresses and that some exception processing is performed on a BHT miss. This exception processing can be performed by software, microcode, or hardware depending on the degree and flexibility of protection desired and the performance considerations. To simplify the concept, a software mechanism, with a slightly modified BHT, is considered first, but other implementations are possible.

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Improving Operational Performance of Cache Memories - Branch Protection Through Branch History Tables

A technique is described whereby branch history table is used to protect against incorrect supervisor program operation, as used in cache memory devices. The concept's implementation of using branch history table (BHT) to prevent unintended branch operations also provides a method of ensuring that the BHT contains only "valid" branch target addresses and that some exception processing is performed on a BHT miss. This exception processing can be performed by software, microcode, or hardware depending on the degree and flexibility of protection desired and the performance considerations. To simplify the concept, a software mechanism, with a slightly modified BHT, is considered first, but other implementations are possible. The BHT is modified so that if a BHT miss is encountered, and the source and target addresses are not in the same page, an interrupt is generated. A procedure can then be implemented to verify that the putative branch target is "valid". If the address is not "valid", appropriate recovery action is taken. Depending on the degree of protection desired, either simple or sophisticated validation techniques can be applied. In particular, it may be simple to determine that a branch target is invalid, such as branching into a known data area. It may also be useful to only note that the branch is suspect, such as finding that it is not in a list of commo...