Browse Prior Art Database

480-Pel Feature for Image Generation Subsystem of a System Printer

IP.com Disclosure Number: IPCOM000034412D
Original Publication Date: 1989-Feb-01
Included in the Prior Art Database: 2005-Jan-27
Document File: 2 page(s) / 63K

Publishing Venue

IBM

Related People

Hoskins, PK: AUTHOR

Abstract

An image generation subsystem for a 240-pel system printer is shown in Fig. 1. This is an all-points-addressable image generation subsystem (IGS). The IGS shown in Fig. 2 is for a 480 pel version. The 480 pel is compatible with the 240 pel IGS. The basic architecture of the 240 pel IGS is used in the 480 pel IGS. The 480 pel version takes advantage of the fact that no increase in resolution in the granularity is required. It also uses the same code to control, and except for image data requires no greater data channel rate when printing. The 480 pel adds three pattern stores and three raster buffers to the 240 pel IGS. By making the data from each PS accessible to each RB the 480 pel IGS uses the same architecture as the 240 pel. A brief explanation of the 240 pel architecture follows: There are 11 blocks shown in Fig. 1.

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480-Pel Feature for Image Generation Subsystem of a System Printer

An image generation subsystem for a 240-pel system printer is shown in Fig. 1. This is an all-points-addressable image generation subsystem (IGS). The IGS shown in Fig. 2 is for a 480 pel version. The 480 pel is compatible with the 240 pel IGS. The basic architecture of the 240 pel IGS is used in the 480 pel IGS. The 480 pel version takes advantage of the fact that no increase in resolution in the granularity is required. It also uses the same code to control, and except for image data requires no greater data channel rate when printing. The 480 pel adds three pattern stores and three raster buffers to the 240 pel IGS. By making the data from each PS accessible to each RB the 480 pel IGS uses the same architecture as the 240 pel. A brief explanation of the 240 pel architecture follows: There are 11 blocks shown in Fig. 1. The first five are control blocks to the IGS. They receive data from the host 1 and store image to be printed in the PS 8 or create via 2 a table of codes in the page buffer 4. The IGS control processor 6 will interrupt these codes and move patterns to be printed from the PS 8 to the RB 11. The data is stored in RB 11 in the format it is to be printed. Once the data is in the RB 11, it is taken from the RB 11 and sent to the print head where it is converted into the serial pattern for the print head.

(Image Omitted)

In Fig. 2, the blocks up to the sequence control 6 are unchanged...