Browse Prior Art Database

Data Area Extension for Basic Input/Output System

IP.com Disclosure Number: IPCOM000034421D
Original Publication Date: 1989-Feb-01
Included in the Prior Art Database: 2005-Jan-27
Document File: 3 page(s) / 48K

Publishing Venue

IBM

Related People

Bealkowski, R: AUTHOR [+2]

Abstract

A technique is described whereby the data area, as in personal computer compatibility mode basic input/output system (BIOS) architecture, is extended so as to increase the size of the BIOS data area. The architecture uses a variable memory approach to increase the data area. This enables the BIOS to accommodate the installation of compatibility enhancements, without sacrificing established functions, while preventing the possibility of over-writing existing software. In a typical personal computer (PC), the compatibility data (CDATA) area is generally defined at location 1024 (400H) in the random-access memory (RAM) unit. The size of the CDATA area is 256 bytes (100H), and the addresses used by the CDATA area are 1024 (400H) through 1279 (4FFH).

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 52% of the total text.

Page 1 of 3

Data Area Extension for Basic Input/Output System

A technique is described whereby the data area, as in personal computer compatibility mode basic input/output system (BIOS) architecture, is extended so as to increase the size of the BIOS data area. The architecture uses a variable memory approach to increase the data area. This enables the BIOS to accommodate the installation of compatibility enhancements, without sacrificing established functions, while preventing the possibility of over-writing existing software. In a typical personal computer (PC), the compatibility data (CDATA) area is generally defined at location 1024 (400H) in the random-access memory (RAM) unit. The size of the CDATA area is 256 bytes (100H), and the addresses used by the CDATA area are 1024 (400H) through 1279 (4FFH). However, with the advent of the personal systems, such as the IBM PS/2, the remaining size of the BIOS CDATA area was rapidly exhausted restricting the ability to accommodate an increase in enhancement devices. A typical RAM map representing the prior-art CDATA area, as shown in Fig. 1, portrays the RAM area usage for each absolute address hexadecimal representation of the CDATA area up to the one megabyte boundary. Because of this boundary, the CDATA area can not be expanded to an adjacent area of RAM. So as to provide CDATA area extendibility, the concept implements a new data area, called the extended data (XDATA) area, as shown in Fig. 2. The XDATA area resides in RAM at the top of the defined memory. The XDATA architecture is designed to prevent problems, such as over-writing of the XDATA area, and to provide a means of locating the actual XDATA allocation area. Power-on-self-test (POST) routines determine the XDATA area allocation and adjust the memory size variable. To prevent existing sof...