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Three-Dimensional Tape Automated Bonding

IP.com Disclosure Number: IPCOM000034449D
Original Publication Date: 1989-Feb-01
Included in the Prior Art Database: 2005-Jan-27
Document File: 2 page(s) / 47K

Publishing Venue

IBM

Related People

Gruber, H: AUTHOR [+3]

Abstract

Tape automated bonding (TAB) is used to assemble semiconductor chips 1. For this purpose, there is a two-dimensional fan-out of the connecting lines 2 from the chip to the respective next wiring medium 3, say, a circuit card. Card technology requires that the conductor spacing be considerably in excess of that used on chips. This leads to relatively long fan-outs, as shown in the plan view of Fig. 1. The space needed for such long lines is several times that consumed by the chip. In addition, those lines have a high inductance which adversely affects the transmission speed. As a result of etching, the conductor spacing on the card will invariably exceed that on the chip, which limits fan-out. However, conditions are improved by a three-dimensional fan-out of the connecting lines 2.

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Three-Dimensional Tape Automated Bonding

Tape automated bonding (TAB) is used to assemble semiconductor chips 1. For this purpose, there is a two-dimensional fan-out of the connecting lines 2 from the chip to the respective next wiring medium 3, say, a circuit card. Card technology requires that the conductor spacing be considerably in excess of that used on chips. This leads to relatively long fan-outs, as shown in the plan view of Fig. 1.

The space needed for such long lines is several times that consumed by the chip. In addition, those lines have a high inductance which adversely affects the transmission speed. As a result of etching, the conductor spacing on the card will invariably exceed that on the chip, which limits fan-out. However, conditions are improved by a three-dimensional fan-out of the connecting lines 2. For this purpose, the bottom side of the card is used as an additional wiring means. As a result, every other connection is

(Image Omitted)

positioned on the top or the bottom side of circuit card 3. Chip 1 is connected to conductors 2 of a plastic foil by standard processes (inner lead bonding). The sectional view of Fig. 2 shows the assembly of the structure on card 3, to which it is attached by soldering. Card 3 comprises a recess 4 for each component. Further advantages are: The area requirements of the structure of Fig. 3

are about a quarter those of Fig. 1.

The shorter conductors 2 lead to considerably

improved electrical characteristics....