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Small Computer System Interface Arbitration Priority Determinator

IP.com Disclosure Number: IPCOM000034475D
Original Publication Date: 1989-Feb-01
Included in the Prior Art Database: 2005-Jan-27
Document File: 3 page(s) / 75K

Publishing Venue

IBM

Related People

Christianson, MD: AUTHOR [+3]

Abstract

The SCSI (Small Computer System Interface) specification (Rev. 17B) requires the various devices on the bus to arbitrate for control of the bus. Each device arbitrating is to activate the busy signal and the data bit corresponding to its own ID; there is a limit of eight devices on the bus. Under the agreement that bit 0 of the data bus has the (Image Omitted) highest priority and bit 7 has the lowest priority, each device must decide whether or not it has won the arbitration phase by determining if its own ID bit is the one of highest priority on the data bus. Before entering arbitration, the device must decide if the SCSI bus is in a valid bus-free phase. Upon doing so, the device's arbitration logic begins to function by letting the other devices on the bus know it is participating in the arbitration phase.

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Small Computer System Interface Arbitration Priority Determinator

The SCSI (Small Computer System Interface) specification (Rev. 17B) requires the various devices on the bus to arbitrate for control of the bus. Each device arbitrating is to activate the busy signal and the data bit corresponding to its own ID; there is a limit of eight devices on the bus. Under the agreement that bit 0 of the data bus has the

(Image Omitted)

highest priority and bit 7 has the lowest priority, each device must decide whether or not it has won the arbitration phase by determining if its own ID bit is the one of highest priority on the data bus. Before entering arbitration, the device must decide if the SCSI bus is in a valid bus-free phase. Upon doing so, the device's arbitration logic begins to function by letting the other devices on the bus know it is participating in the arbitration phase. The device drives busy true and its ID bit true on the data bus. Approximately 2.2 ms later, the device may determine if it is the arbitration winner or not. Entering the arbitration logic are eight lines labeled sid0 through sid7 (Figs. 1 and 2). Only one of these lines will be active and will correspond to the device's own ID as assigned by microcode in one of the hardware's internal three-bit registers. Of the signals pry0 through pry7, only one can become active during an arbitration phase. For one of these signals to become active, it must correspond to the device's ID and the device must be the winner of the arbitration; there must be no ID bits on the data bus w...