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Vertical Deflection Circuit

IP.com Disclosure Number: IPCOM000034492D
Original Publication Date: 1989-Mar-01
Included in the Prior Art Database: 2005-Jan-27
Document File: 2 page(s) / 33K

Publishing Venue

IBM

Related People

Kobayashi, M: AUTHOR

Abstract

Disclosed is a vertical deflection circuit which realizes a vertical deflection of a beam on a display surface in synchronism with a vertical synchronous signal of any frequency. Referring to the figure, an input terminal 5, to which a synchronous signal is applied, of a conventional vertical processing IC is opened, and the circuit shown is connected to input terminals 3, 4 and 6. When a vertical synchronous signal (V-SYNC) is held at a high or low voltage level, the base of the transistor Q1 is pulled down to a ground level by the resistor R2. The transistor Q1 is turned off, and current is not supplied from the transistor Q1 to trigger a self- oscillation of the circuit including a resistor R0, a capacitor C0, an amplifier OP1, a comparator CP1 and a bias voltage source.

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Vertical Deflection Circuit

Disclosed is a vertical deflection circuit which realizes a vertical deflection of a beam on a display surface in synchronism with a vertical synchronous signal of any frequency. Referring to the figure, an input terminal 5, to which a synchronous signal is applied, of a conventional vertical processing IC is opened, and the circuit shown is connected to input terminals 3, 4 and 6. When a vertical synchronous signal (V-SYNC) is held at a high or low voltage level, the base of the transistor Q1 is pulled down to a ground level by the resistor R2. The transistor Q1 is turned off, and current is not supplied from the transistor Q1 to trigger a self- oscillation of the circuit including a resistor R0, a capacitor C0, an amplifier OP1, a comparator CP1 and a bias voltage source. The time constant of oscillation is determined by the values of the resistor R0 and the capacitor C0, and these values must be adjusted to generate the oscillation at the range of 40 Hz to 50 Hz. When the vertical synchronous signal is applied, the base voltage of the transistor Q1 is raised to a positive voltage, and the transistor Q1 is turned on and supplies a current to the input terminal 4 of the conventional vertical processing IC through the resistor R1, so that a retrace operation in the conventional vertical processing IC is started. In this manner, the vertical deflection and retrace operations in the conventional vertical processing IC are synchronized wi...