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Intermittent Memory Failure Detection and Reconfiguration

IP.com Disclosure Number: IPCOM000034527D
Original Publication Date: 1989-Mar-01
Included in the Prior Art Database: 2005-Jan-27
Document File: 1 page(s) / 12K

Publishing Venue

IBM

Related People

Carlson, BA: AUTHOR [+3]

Abstract

Through the use of a memory exerciser routine and spare memory modules included as part of a microprocessor-controlled Field Replaceable Unit (FRU), intermittently failing memory modules can be detected and replaced dynamically, reducing Repair Actions (RAs), system downtime, and re IML/IPLs. This exerciser also allows manufacturing to rigorously test FRU memories, substantially reducing the number of intermittently failing parts shipped to the field. To eliminate the problems caused by intermittently failing memory modules, a memory exerciser routine is provided as part of the microcode associated with a microprocessor-controlled FRU.

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Intermittent Memory Failure Detection and Reconfiguration

Through the use of a memory exerciser routine and spare memory modules included as part of a microprocessor-controlled Field Replaceable Unit (FRU), intermittently failing memory modules can be detected and replaced dynamically, reducing Repair Actions (RAs), system downtime, and re IML/IPLs. This exerciser also allows manufacturing to rigorously test FRU memories, substantially reducing the number of intermittently failing parts shipped to the field. To eliminate the problems caused by intermittently failing memory modules, a memory exerciser routine is provided as part of the microcode associated with a microprocessor-controlled FRU. The base exerciser loop portion of this routine must be contained in ROS as control store memory that will be destroyed during the test, although the code used to provide the initial interface to the system or test unit may be provided as part of a separate code load. The program described on the next page is used to rigorously exercise the FRU's control and data stores, searching, for intermittent memory failures. Once invoked, this program will continuously write and read various patterns into memory until a reset signal is received by the FRU. Whenever a failure is detected by the program, the failing module will be removed from the memory configuration and replaced with a spare module. If no spares are available, the program will send a message to the system requesting c...