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l00% PRECISE CONTROL ON LOADING INTEL 8253, 8254 PROGRAMMABLE INTERVAL TIMER

IP.com Disclosure Number: IPCOM000034567D
Original Publication Date: 1989-Mar-01
Included in the Prior Art Database: 2005-Jan-27
Document File: 2 page(s) / 29K

Publishing Venue

IBM

Related People

Cheng, CK: AUTHOR

Abstract

Disclosed is a software procedure for a 100% precise control on loading the Intel 8253 or 8254 programmable interval timer. The procedure is applicable to the environment, as shown in the figure, where the input clock of counter 2 is from the output of counter 0. Usually, counter 0 is programmed to supply a steady input clock for counter 2, while counter 2 is programmed to time the desired time interval without any intervention from counter 0. This leaves some uncertainty on both the counting of counter 2 and the reading of the counter 2 value. The disclosed software procedure will precisely control the loading of counter 2 and leave no uncertainty on both the counting of counter 2 and the reading of the counter 2 value. The procedure is: 1) Ungate counter 2 - to disable counter 2.

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l00% PRECISE CONTROL ON LOADING INTEL 8253, 8254 PROGRAMMABLE INTERVAL TIMER

Disclosed is a software procedure for a 100% precise control on loading the Intel 8253 or 8254 programmable interval timer. The procedure is applicable to the environment, as shown in the figure, where the input clock of counter 2 is from the output of counter 0. Usually, counter 0 is programmed to supply a steady input clock for counter 2, while counter 2 is programmed to time the desired time interval without any intervention from counter 0. This leaves some uncertainty on both the counting of counter 2 and the reading of the counter 2 value. The disclosed software procedure will precisely control the loading of counter 2 and leave no uncertainty on both the counting of counter 2 and the reading of the counter 2 value. The procedure is: 1) Ungate counter 2 - to disable counter 2.

2) Set counter 2 for desired operation mode - program

counter 2 mode register for desired operation.

3) Set counter 0 for mode 0 operation - reset output of

counter 0.

4) Load counter 2 with desired timer constant(s) -

start to

load counter 2.

5) Set counter 0 for mode 3 operation - to pulse output

of

counter 0.

6) Set counter 0 for mode 0 operation - reset output of

counter 0.

7) Set counter 0 for mode 3 operation - resume

operation of

counter 0.

8) Reload counter 0 timer constant(s) - resume output

of

counter 0.

9) Gate counter 2 - start the counting of counter 2. This procedure applies to the design in whic...