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Integrated Hardware/Software Interrupt Controller

IP.com Disclosure Number: IPCOM000034650D
Original Publication Date: 1989-Mar-01
Included in the Prior Art Database: 2005-Jan-27
Document File: 7 page(s) / 101K

Publishing Venue

IBM

Related People

Anthony, BO: AUTHOR [+5]

Abstract

A new method of handling interrupts has been developed which involves both new hardware and new software designed together for this purpose. This new interrupt-handling system provides greater flexibility than other interrupt controllers previously available. This method provides a method of interrupt control which dynamically assigns any hardware interrupt line to any priority. It also handles first the interrupt of highest priority if more than one is pending. Then, while processing one interrupt, it allows an interrupt of higher priority to interrupt processing of a lower priority interrupt. Also, it supplies more hardware interrupt lines than are initially used to allow for future expansion. These lines are activated, but currently they act as if they are not present.

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Integrated Hardware/Software Interrupt Controller

A new method of handling interrupts has been developed which involves both new hardware and new software designed together for this purpose. This new interrupt-handling system provides greater flexibility than other interrupt controllers previously available. This method provides a method of interrupt control which dynamically assigns any hardware interrupt line to any priority. It also handles first the interrupt of highest priority if more than one is pending. Then, while processing one interrupt, it allows an interrupt of higher priority to interrupt processing of a lower priority interrupt. Also, it supplies more hardware interrupt lines than are initially used to allow for future expansion. These lines are activated, but currently they act as if they are not present. To allow future

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changes, it is possible to dynamically assign interrupt priorities from a program. This assignment does not require any changes or even re- compilations of the device specific setup or interrupt handling code. To allow the possibility of nested interrupts, at the conclusion of each interrupt routine only the specific interrupt which had been complete is reset in the controller. To preserve future flexibility, this reset is also independent of the interrupt priority or the interrupt vector assignment. During the processing of an interrupt, it uniquely determines which input caused the interrupt. Finally, software has been developed which could effectively utilize this flexible interrupt controller in a multi-tasking environment. The hardware for the interrupt controller consists of several logical parts. A picture of these parts and how they interrelate follows (Fig. 1).

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The first part of the hardware is a line mask. Each entering input line 2 passes through this bit mask. Lines are either passed through or blocked by this mask. The primary reason for the mask is to temporarily ignore active interrupt lines which the software is not prepared to handle, but it is also used to disable lines which are not in use. The next piece of hardware 3 handles the priority assignment. Under program control this device establishes a variable linkage between any input line and any output line. Simply, any hardware interrupt line can be associated with any interrupt priority. Further, a single interrupt line can be assigned multiple priorities. For example, using this hardware, the software can assign interrupt line 3 to both interrupt priority 6 and 7. This priority level assignment allows variability in the relative priorities of the various hardware devices attached to the system. If a new device is added, the software simply assigns the device an available priority relative to existing devices. Likewise, priorities of existing devices can be modified, if necessary. This line priority association is independent of the device- specific software. Only the initial setup code is affect...