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Three-Plane Magnetic Field Detector

IP.com Disclosure Number: IPCOM000034718D
Original Publication Date: 1989-Apr-01
Included in the Prior Art Database: 2005-Jan-27
Document File: 2 page(s) / 54K

Publishing Venue

IBM

Related People

Reschke, DA: AUTHOR

Abstract

A vector summing circuit for an antenna having three orthogonally disposed windings enables determination of the resultant magnetic vector without antenna rotation nor compromise of signal magnitude, time rate of change or phase relationship. The circuit, shown in Figs. 1a and 1b, uses phase correction, peak-to-peak detection, DC bias control, signal squaring and summing, and determination of signal square root to calculate the resultant magnetic vector. In Fig. 1a, each of three orthogonally disposed antenna coils is attached to a respective one of terminals 1, Xin, Yin or Zin, that each serve as an input to an impedance matching and gain adjustment circuit 2 for the coil and the subsequent circuits.

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Three-Plane Magnetic Field Detector

A vector summing circuit for an antenna having three orthogonally disposed windings enables determination of the resultant magnetic vector without antenna rotation nor compromise of signal magnitude, time rate of change or phase relationship. The circuit, shown in Figs. 1a and 1b, uses phase correction, peak- to-peak detection, DC bias control, signal squaring and summing, and determination of signal square root to calculate the resultant magnetic vector. In Fig. 1a, each of three orthogonally disposed antenna coils is attached to a respective one of terminals 1, Xin, Yin or Zin, that each serve as an input to an impedance matching and gain adjustment circuit 2 for the coil and the subsequent circuits. The sensed magnetic field at any coil induces positive or negative current flow according to its phase relative to the other two inputs. Phase correlation is achieved by comparing the sum (S) and difference (W) at all three pairs of inputs XY, YZ, ZX. (Only that for X versus Y is shown.) Each sum and difference output is applied to a peak-to-peak detector 3 to remove DC bias that might appear on an unsymmetrical waveform. The sums and differences are inputs to comparing circuits 4 and produce an out-of-phase signal W > S when the difference is greater than the sum. Comparators 4 each have a small amount of hysteresis and DC bias to ensure stable operation about switch points and zero voltage inputs. The three out-of-phase outputs...