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Multiple Path Status Reporting

IP.com Disclosure Number: IPCOM000034854D
Original Publication Date: 1989-May-01
Included in the Prior Art Database: 2005-Jan-27
Document File: 4 page(s) / 67K

Publishing Venue

IBM

Related People

Hanna, SD: AUTHOR

Abstract

Any of the status reporting techniques described can also be used to detect invalid combinations of card and module engineering change levels. The engineering change level merely becomes a status bit that is reported from each device. The main microprocessor must be able to read one or more addresses that may be defined as hardware registers. These registers must contain sufficient information to allow the microcode to distinguish between different engineering change hardware levels or different error syndromes. The status reporting logic is designed to provide two paths to report errors and status. This design technique eliminates the problem of bypassing bus hang conditions. Bus hangs are caused by many, different error conditions.

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Multiple Path Status Reporting

Any of the status reporting techniques described can also be used to detect invalid combinations of card and module engineering change levels. The engineering change level merely becomes a status bit that is reported from each device. The main microprocessor must be able to read one or more addresses that may be defined as hardware registers. These registers must contain sufficient information to allow the microcode to distinguish between different engineering change hardware levels or different error syndromes. The status reporting logic is designed to provide two paths to report errors and status. This design technique eliminates the problem of bypassing bus hang conditions. Bus hangs are caused by many, different error conditions. A separate reporting path that does not depend on a complicated bus architecture allows the software to isolate and to report errors properly for FRU (Field Replaceable Unit) isolation. A straightforward technique for a status reporting design utilizes a readable register on each device containing the status for that device. This technique can be utilized to allow for engineering changes that only affect the basic card design layout. Several program pins that describe card changes should be provided as inputs into one or more of the modules which already contain an interface to the microprocessor. Each engineering change would then update the value that is programmed on the inputs of these modules. The straightforward technique mentioned previously does not require that non-LSI engineering changes include card engineering changes in order to make the engineering change value readable. Rewiring the card to program the engineering change level for non-LSI changes can be avoided by allowing for several different assembly configurations.

Each assembly configuration can be designed to change the programmable engineering change values without changing the card wiring. One way to reprogram the engineering change value is to move resistors around on the card to program 1's and 0's on the programmed pins. Many components of a design (modules, cards, etc.) may not be equipped with pre-existing interfaces to the microprocessor. An alternative to a design technique that uses individual separate interfaces is usually necessary. Such an alternative design technique must pass status information from the devices that have no interface connections to the devices that have interface connections. The following design techniques are designed to minimize the module or card pin usage. A technique that can be used to allow devices without interfaces to pass on status data to devices with interfaces is described in the following section. Each module without an interface can drive several status pins to the interface module, but this design technique uses up pins very quickly. An alternative design technique, shown in Fig. 1, creates a shift register to transfer status data. The devices comprisi...