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Vs Fortran Software Code Module for FET Capacitance Transition Smoothing

IP.com Disclosure Number: IPCOM000034925D
Original Publication Date: 1989-May-01
Included in the Prior Art Database: 2005-Jan-27
Document File: 3 page(s) / 52K

Publishing Venue

IBM

Related People

DeHond, MR: AUTHOR [+3]

Abstract

An improved method for calculating field-effect transistor (FET) capitance is shown. Previous FET capacitance calculating methods had discontinuities at operating region transition points and utilized hyperbolic tangent, e.g., (tanh), functions to smooth some of the transition points. Other transitions points were not smoothed, introducing errors and convergence problems into the circuit simulation process. A new method for calculating FET transistor capacitance yields a continuous capacitance function across all operating region transition points between the linear, saturation and cutoff regions by means of weighting values derived from a special parabolic function utilizing device voltage characteristics. There are five capacitors in a FET model as shown in Fig. 1, i.e.

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Vs Fortran Software Code Module for FET Capacitance Transition Smoothing

An improved method for calculating field-effect transistor (FET) capitance is shown. Previous FET capacitance calculating methods had discontinuities at operating region transition points and utilized hyperbolic tangent, e.g., (tanh), functions to smooth some of the transition points. Other transitions points were not smoothed, introducing errors and convergence problems into the circuit simulation process. A new method for calculating FET transistor capacitance yields a continuous capacitance function across all operating region transition points between the linear, saturation and cutoff regions by means of weighting values derived from a special parabolic function utilizing device voltage characteristics. There are five capacitors in a FET model as shown in Fig. 1, i.e., gate-to-source (Cgs), gate-to-drain (Cgd), gate-to-substrate (Cgx), source-to-substrate (Csx) and drain-to-substrate (Cdx). Standard capacitance models contain components for each of the three operating regions (off, linear and saturated). For example, the capacitance Cgs is calculated from the sum of the operating region components (off, linear and saturated) weighted by a smoothing coefficient for that region. Without considering the weighting functions, the FET is in the off region when Vgs < Vt, where Vt is the device threshold voltage. The device enters the linear region when Vgs / Vt and Vds < Vgs - Vt. Saturation occurs when Vgs / Vt and Vds / Vgs - Vt.

The weighting function used in the new method utilizes sections of a parabola of the form y = b/W2 ( x - W)2 shown in Fig. 2 to form smoothing curves. The parabolas y = f(x) and 1 - f(x) are plotted over the ranges 0 & x < W and - W & x < 0, respectively, to form the full smoothing function used in each of the three weighting terms, i.e., off-linear, linear-saturation and off-saturation. The smoothing function is continuous through the first derivative. Referring to Fig. 3, outside of the transition regions the off term is defined to be 1 for Vgs & Vt - W, the linear term is defined to be 1 for Vgs / Vt + W and Vds & Vgs - Vt - W and the saturation term is defined to be 1 for Vgs / Vt + W and Vds / Vgs - Vt + W.

Each smoothing term is zero outside of its active area and its own transition region. The dotted lines indicate transition regions where smoothing takes place. Note that all thresholds and...