Browse Prior Art Database

Programmable Digital Glitch Filter

IP.com Disclosure Number: IPCOM000034964D
Original Publication Date: 1989-May-01
Included in the Prior Art Database: 2005-Jan-28
Document File: 2 page(s) / 55K

Publishing Venue

IBM

Related People

Broockman, EC: AUTHOR [+2]

Abstract

In a bar code reader, reflected light from the bar code is processed to produce a digital signal. A binary 1 may represent a black bar and a binary 0 represents a white space. The time duration in either state is directly proportional to the time the scanning beam was over the associated bar or space. White dust in the middle of a black bar introduces a 'glitch' into the data stream. The circuit described removes this glitch from the data stream. Glitches can be introduced by a variety of sources, other than dust, including dirt, ink, smudges, poor printing, paper texture, reflectivity changes and ambient light spikes. The digital glitch filter is programmable and filters any glitch of duration less than or equal to a specified glitch count.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 52% of the total text.

Page 1 of 2

Programmable Digital Glitch Filter

In a bar code reader, reflected light from the bar code is processed to produce a digital signal. A binary 1 may represent a black bar and a binary 0 represents a white space. The time duration in either state is directly proportional to the time the scanning beam was over the associated bar or space. White dust in the middle of a black bar introduces a 'glitch' into the data stream. The circuit described removes this glitch from the data stream. Glitches can be introduced by a variety of sources, other than dust, including dirt, ink, smudges, poor printing, paper texture, reflectivity changes and ambient light spikes. The digital glitch filter is programmable and filters any glitch of duration less than or equal to a specified glitch count. The circuit can be realized by a collection of three standard off-the-shelf logic components. The circuit is made from three latches, two Exclusive OR gates and one binary counter. Referring to the figure, data latch 1 is a D flip-flop which captures the value of the input digital data stream on the rising edge of the input clock signal. Data latch 2 is a delayed sample of latch
1. Exclusive OR gate 5 is used as an edge detector. When the data in latch 1 is different than the data in latch 2, Exclusive OR gate 5 will activate the Load Preset into Counter signal. This signal synchronously (on the positive going clock edge) loads the counter to the value of the Digital Glitch Filter Preset inputs noted by 7. The Filter Preset input is a value supplied by the systems microprocessor. It represents the length of the shortest valid data pulse. All pulses shorter than the filter setting are to be ignored. CASE 1) New Pulse Width = > Filter Setting: Valid Data Pulse A change in value of the Input Digital Data produces an edge transition in the data. Exclusive OR gate 5 detects this edge and activates the Load Preset signal and causes the Binary Counter 6 to be preset to the filter value. (If the Counter Overflow signal had been active, it now go...