Browse Prior Art Database

Universal Read/Modify/Write Operation Implementation Invention

IP.com Disclosure Number: IPCOM000034992D
Original Publication Date: 1989-May-01
Included in the Prior Art Database: 2005-Jan-28
Document File: 2 page(s) / 48K

Publishing Venue

IBM

Related People

Hinz, KC: AUTHOR [+2]

Abstract

In a system where Read/Modify/Write commands are accompanied by a mask byte, a simple and easy method with which to handle the Read/ Modify/Write command is to treat it as a normal eight byte DMA transfer, using the mask byte to gate the data strobe tags used to write the data bytes into memory. In essence, if the bit position in the mask byte is not active, the logic will go through a DMA cycle but no data will be transferred? By using this scheme, every possible starting address and mask byte configuration are treated exactly the same. A high level view of the logic needed to execute the Read/ Write/Modify operation is shown in Fig. 1. To illustrate, assume that a Read/Modify/Write command was received with a starting address of X'100' and a mask byte of B'01111000'.

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Universal Read/Modify/Write Operation Implementation Invention

In a system where Read/Modify/Write commands are accompanied by a mask byte, a simple and easy method with which to handle the Read/ Modify/Write command is to treat it as a normal eight byte DMA transfer, using the mask byte to gate the data strobe tags used to write the data bytes into memory. In essence, if the bit position in the mask byte is not active, the logic will go through a DMA cycle but no data will be transferred? By using this scheme, every possible starting address and mask byte configuration are treated exactly the same. A high level view of the logic needed to execute the Read/ Write/Modify operation is shown in Fig. 1. To illustrate, assume that a Read/Modify/Write command was received with a starting address of X'100' and a mask byte of B'01111000'. This command is to write data to storage at locations X'101', X'102', X'103', and X'104'. The Read/Modify/Write logic will always execute bus cycles regardless of the contents of the mask byte. In this example, when an address of X'100' is presented to memory the memory strobes are not asserted; but when an address of X'102' is presented the strobes are asserted. For the remaining addresses, the strobe is either asserted or not asserted in a similar fashion. This method can be expanded for buses with multiple data bytes and multiple data strobes. For example, the Motorola 68000 microprocessor uses two data strobes (Upper Data Strobe and...