Browse Prior Art Database

Low Stress Dielectric Coatings for Copper Parts

IP.com Disclosure Number: IPCOM000035006D
Original Publication Date: 1989-May-01
Included in the Prior Art Database: 2005-Jan-28
Document File: 2 page(s) / 36K

Publishing Venue

IBM

Related People

Cuomo, JJ: AUTHOR [+5]

Abstract

Disclosed is a process for depositing high thermal conductivity dielectrics onto metallic substrates such as copper. Applications require that the dielectric layer be pinhole and crack free with low stress and good adhesion to the copper. A dielectric having suitable material properties, the process for depositing such a dielectric, as well as the controlling parameters that determine the final properties are described herein. Amorphous silicon nitride (Si3N4) is used because of its high thermal conductivity (35 W/m-K), high electrical resistivity, and dielectric breakdown strength. Crack-free films 5.0mm thick can be deposited with good adhesion to copper using a plasma-enhanced chemical vapor deposition (PECVD) process.

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Low Stress Dielectric Coatings for Copper Parts

Disclosed is a process for depositing high thermal conductivity dielectrics onto metallic substrates such as copper. Applications require that the dielectric layer be pinhole and crack free with low stress and good adhesion to the copper. A dielectric having suitable material properties, the process for depositing such a dielectric, as well as the controlling parameters that determine the final properties are described herein. Amorphous silicon nitride (Si3N4) is used because of its high thermal conductivity (35 W/m-K), high electrical resistivity, and dielectric breakdown strength. Crack-free films 5.0mm thick can be deposited with good adhesion to copper using a plasma-enhanced chemical vapor deposition (PECVD) process. In this process the film is deposited using a mixture of silane and ammonia gas with constant flow rates of 2.6 and 6.5 sccm, respectively. The total pressure is about 30 mTorr. The process is driven by biasing an electrode (cathode) with 13.56 MHz power at a power density of 1.0 W/cm2 . The counter- electrode (anode) which holds the copper substrates is grounded. During deposition the substrate temperature is 150 to 165o . The copper substrates are sputter-etched prior to deposition. The key to making this material system work is matching the intrinsic stress of the Si3N4 film to the thermal expansion mismatch between the film and the substrate. The total stress is smaller than its two main component parts. The design of the process parameters is depicted in the figure which shows the stress as a function of substrate temperature during dep...