Browse Prior Art Database

Multiport Asynchronous Events Digital Monitoring System

IP.com Disclosure Number: IPCOM000035325D
Original Publication Date: 1989-Jul-01
Included in the Prior Art Database: 2005-Jan-28
Document File: 3 page(s) / 53K

Publishing Venue

IBM

Related People

Bersac, JM: AUTHOR [+4]

Abstract

This article describes a circuit allowing control by means of an 8-bit processor of 31 DC/DC blowers and the rotation of which is fully asynchronous with the processor clock.

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Multiport Asynchronous Events Digital Monitoring System

This article describes a circuit allowing control by means of an 8-bit processor of 31 DC/DC blowers and the rotation of which is fully asynchronous with the processor clock.

Fig. 1 shows the general architecture of the circuit allowing the control of the 31 blowers by a microprocessor through a bus interface, a speed logic detection circuit and a multiplexer MPX.

All the DC/DC blowers have their own speed relation; they are all asynchronous with each others.

To detect their speed rotation, they are selected in sequence by multiplexer MPX driven by a 5-bit counter such as shown in Fig. 2. Each blower is selected during a dividing of the Main clock circuitry (four period maximum must be included inside the time selection 'window').

As each blower is asynchronous with the main clock of the circuits, at the beginning of each selector, a reset is used to assure that the concerned blower is installed inside the right window and all the circuits set at a good defined level (this reset is done by the help of 3 bits of the counter A+B+C).

Then, the circuit is ready to analyze the period of the output blower. After the reset: 1. The first positive front of the selected blower sets a counter (%N). When this counter (%N) has reached a defined status, a signal clocks the level of the selected signal and resets the counter (%N): - if the latched level is high, the period of the blower signal is wider than expected so a positive front is sent to the clocking of the memory which loads the counter status (1 word of...