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Dfci Master Slave Busy Queueing Algorithm

IP.com Disclosure Number: IPCOM000035336D
Original Publication Date: 1989-Jul-01
Included in the Prior Art Database: 2005-Jan-28
Document File: 2 page(s) / 52K

Publishing Venue

IBM

Related People

Lambeth, SM: AUTHOR [+4]

Abstract

This article describes an algorithm which enhances the performance of an IPI-3 Master with a Slave that uses the slave-busy status to reject new command packets. IPI-3 is an interface defined by ANSI between a master and slave. The slave is an I/O device (DASD), and the master is particularly an I/O processor which communicates with the I/O device. A "packet" is that part of the definition of the IPI-3, particularly a number of bytes, that defines a command that the master wants the I/O device to accomplish. This algorithm efficiently processes the slave-busy status during a command packet transfer, prevents command packet transfer to a known busy slave, and recognizes slave busy to not-busy transitions.

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Dfci Master Slave Busy Queueing Algorithm

This article describes an algorithm which enhances the performance of an IPI-3 Master with a Slave that uses the slave-busy status to reject new command packets. IPI-3 is an interface defined by ANSI between a master and slave. The slave is an I/O device (DASD), and the master is particularly an I/O processor which communicates with the I/O device. A "packet" is that part of the definition of the IPI-3, particularly a number of bytes, that defines a command that the master wants the I/O device to accomplish. This algorithm efficiently processes the slave-busy status during a command packet transfer, prevents command packet transfer to a known busy slave, and recognizes slave busy to not-busy transitions. This algorithm reduces master and slave resource utilization and disruptive, interferential master-slave interactions, thereby improving I/O operation average response time.

This queueing algorithm, termed "slave-busy queueing", defines a special queue for each slave (slave-busy queue) which holds command packet transfer operations when the slave becomes busy. Initially, all the slave-busy queues are empty, which implies that the master has not received a slave stimulus from any slave indicating slave-busy, and each slave is assumed not busy and available. The figure illustrates the slave-busy queueing algorithm flow as described below.

When the master prepares to transfer a command packet, it checks the slave-busy queue...