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Semiconductor Isolation Structure and Process Using Epitaxy Overgrowth

IP.com Disclosure Number: IPCOM000035358D
Original Publication Date: 1989-Jul-01
Included in the Prior Art Database: 2005-Jan-28
Document File: 3 page(s) / 48K

Publishing Venue

IBM

Related People

Arienzo, M: AUTHOR [+2]

Abstract

A technique is described whereby a semiconductor isolation structure and process provides device isolation space smaller than the minimum lithography feature size. By using lateral epitaxy overgrowth, a reversed "T" shape is achieved, requiring shorter temperature cycles and no extra mask steps when compared to previous processes.

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Semiconductor Isolation Structure and Process Using Epitaxy Overgrowth

A technique is described whereby a semiconductor isolation structure and process provides device isolation space smaller than the minimum lithography feature size. By using lateral epitaxy overgrowth, a reversed "T" shape is achieved, requiring shorter temperature cycles and no extra mask steps when compared to previous processes.

The process to achieve the isolation involves six steps: 1) Starting with a silicon wafer, such as a p-type doped substrate, pad oxide is grown and pad nitride is deposited. Lithography is used to define the pattern where the nitride and the oxide are removed. The p-type field implant is made into a window, as shown in Fig. 1, and then thin local oxide is grown in the exposed silicon region. This local oxide can be much thinner than the conventional local oxidations (LOCOS) so that it has a much smaller "bird beak". 2) Remove the pad nitride and oxide. The local oxide grown in step 1 should be thicker than the pad oxide, such that the local oxide remains on the substrate after the pad oxide is removed. The selective epitaxy technique is then used to grow epi over the substrate and some lateral epi film is overgrown on top of the oxide pad. The lateral epi thickness is adjusted to leave a hole for isolation, as shown in Fig. 2. The epi film can be doped p-type by using either in-situ doping techniques or implantation/annealing. 3) Plasma oxide is deposited over the surface and the portion of the oxide on steep sidewalls is preferentially etched away by buffered HF solution [*]. Then, a p-type glass or polysilicon layer can be deposited to dope the exposed sidewalls of the epi film for field isolation, as shown in Fig. 3.
4) The glass or polysilicon layer and the plasma deposited oxide is removed completely. A thin layer of oxide is thermally grown and pad nitride deposited over the surface. CVD oxide is then deposited and a chemical-and-mechanical polishing technique planarizes the surface so as to leave oxide only in the hole region for isolation, as shown in Fig. 4. 5) The pad nitride and pad oxide layers on the surface are removed and the gate oxide is regrown. Polysilicon is deposited a...